tag: KLA

Metrology Challenges For Gate-All-Around
By Mark LaPedus - 16 Apr, 2020 - Comments: 3

Metrology is proving to be a major challenge for those foundries working on processes for gate-all-around FETs at 3nm and beyond. Metrology is the art of measuring and characterizing structures in devices. Measuring and characterizing structures in devices has become more difficult and expensive at each new node, and the introduction of new types of transistors is making this even harder. Ev... » read more

NVM Reliability Challenges And Tradeoffs
By Bryon Moyer - 13 Apr, 2020 - Comments: 0

This second of two parts looks at different memories and possible solutions. Part one can be found here. While various NVM technologies, such as PCRAM, MRAM, ReRAM and NRAM share similar high-level traits, their physical renderings are quite different. That provides each with its own set of challenges and solutions. PCRAM has had a fraught history. Initially released by Samsung, Micron, a... » read more

Inside The New Non-Volatile Memories
By Bryon Moyer - 07 Apr, 2020 - Comments: 0

The search continues for new non-volatile memories (NVMs) to challenge the existing incumbents, but before any technology can be accepted, it must be proven reliable. “Everyone is searching for a universal memory,” says TongSwan Pang, Fujitsu senior marketing manager. "Different technologies have different reliability challenges, and not all of them may be able to operate in automotive g... » read more

Reliability Challenges Grow For 5/3nm
By SE Staff - 07 Apr, 2020 - Comments: 0

Ensuring that chips will be reliable at 5nm and 3nm is becoming more difficult due to the introduction of new materials, new transistor structures, and the projected use of these chips in safety- and mission-critical applications. Each of these elements adds its own set of challenges, but they are being compounded by the fact that many of these chips will end up in advanced packages or modul... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 27 Mar, 2020 - Comments: 0

Chipmakers TrendForce has released its projected foundry rankings in terms of sales for the first quarter. TSMC is still in first place, followed by Samsung, GlobalFoundries and UMC. Samsung has been ramping up chips based on its 7nm logic process using extreme ultraviolet (EUV) lithography. Now, Samsung is ramping up its DRAM devices using EUV and plans to expand its capacity in the arena.... » read more

Memory Issues For AI Edge Chips
By Mark LaPedus - 23 Mar, 2020 - Comments: 3

Several companies are developing or ramping up AI chips for systems on the network edge, but vendors face a variety of challenges around process nodes and memory choices that can vary greatly from one application to the next. The network edge involves a class of products ranging from cars and drones to security cameras, smart speakers and even enterprise servers. All of these applications in... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 20 Mar, 2020 - Comments: 0

The coronavirus (COVID-19) continues to have an impact on most, if not all, industries. This includes the electronics, semiconductor and related segments. International Data Corp. (IDC) has released a report on the company’s view on the impact the COVID-19 virus will have on the semiconductor market. The report provides a framework to evaluate the market impact through four scenarios. "... » read more

MRAM Process Development And Production Briefing
By Jeff Barnum - 10 Mar, 2020 - Comments: 0

By Dr. Meng Zhu, Dr. Roman Sappey, and Jeff Barnum MRAM (Magnetoresistive Random-Access Memory) is a type of non-volatile memory (NVM) that utilizes magnetic states to store information. The basic structure of MRAM is a magnetic-tunnel junction (MTJ), which consists of two ferromagnetic (FM) layers separated by an insulating tunnel barrier (Fig.1). When the magnetizations of the two magnetic... » read more

Grading Chips For Longer Lifetimes
By Ed Sperling - 10 Mar, 2020 - Comments: 0

Figuring out how to grade chips is becoming much more difficult as these chips are used in applications where they are supposed to last for decades rather than just a couple of years. During manufacturing, semiconductors typically are run through a battery of tests involving performance and power, and then priced accordingly. But that is no longer a straightforward process for several reason... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 28 Feb, 2020 - Comments: 2

SPIE At the SPIE Advanced Lithography conference, Lam Research has introduced a new dry resist technology for extreme ultraviolet (EUV) lithography. Dry resist technology is a new approach to deposit and develop EUV resists. It is a dry deposition technique with alternate compositions and mechanisms. By combining Lam’s deposition and etch process expertise with partnerships with ASML a... » read more

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