tag: ML

Gaps In The AI Debug Process
By Brian Bailey - 23 Nov, 2021 - Comments: 0

When an AI algorithm is deployed in the field and gives an unexpected result, it's often not clear whether that result is correct. So what happened? Was it wrong? And if so, what caused the error? These are often not simple questions to answer. Moreover, as with all verification problems, the only way to get to the root cause is to break the problem down into manageable pieces. The semico... » read more

AI/ML Workloads Need Extra Security
By Bryon Moyer - 15 Nov, 2021 - Comments: 0

The need for security is pervading all electronic systems. But given the growth in data-center machine-learning computing, which deals with extremely valuable data, some companies are paying particular attention to handling that data securely. All of the usual data-center security solutions must be brought to bear, but extra effort is needed to ensure that models and data sets are protected ... » read more

HBM2E Raises The Bar For Memory Bandwidth
By Rambus - 10 Nov, 2021 - Comments: 0

AI/ML training capabilities are growing at a rate of 10X per year driving rapid improvements in every aspect of computing hardware and software. HBM2E memory is the ideal solution for the high bandwidth requirements of AI/ML training, but entails additional design considerations given its 2.5D architecture. Designers can realize the full benefits of HBM2E memory with the silicon-proven memory s... » read more

Bandwidth Utilization Side-Channel On ML Inference Accelerators
By Arm - 10 Nov, 2021 - Comments: 0

Abstract—Accelerators used for machine learning (ML) inference provide great performance benefits over CPUs. Securing confidential model in inference against off-chip side-channel attacks is critical in harnessing the performance advantage in practice. Data and memory address encryption has been recently proposed to defend against off-chip attacks. In this paper, we demonstrate that bandwidth... » read more

Solving Real World AI Productization Challenges With Adaptive Computing
By Nick Ni - 08 Nov, 2021 - Comments: 0

The field of artificial intelligence (AI) moves swiftly, with the pace of innovation only accelerating. While the software industry has been successful in deploying AI in production, the hardware industry – including automotive, industrial, and smart retail – is still in its infancy in terms of AI productization. Major gaps still exist that hinder AI algorithm proof-of-concepts (PoC) from b... » read more

Getting Better Edge Performance & Efficiency From Acceleration-Aware ML Model Design
By Vlad Bronstein - 04 Nov, 2021 - Comments: 0

The advent of machine learning techniques has benefited greatly from the use of acceleration technology such as GPUs, TPUs and FPGAs. Indeed, without the use of acceleration technology, it’s likely that machine learning would have remained in the province of academia and not had the impact that it is having in our world today. Clearly, machine learning has become an important tool for solving... » read more

Easier And Faster Ways To Train AI
By Bryon Moyer - 04 Nov, 2021 - Comments: 0

Training an AI model takes an extraordinary amount of effort and data. Leveraging existing training can save time and money, accelerating the release of new products that use the model. But there are a few ways this can be done, most notably through transfer and incremental learning, and each of them has its applications and tradeoffs. Transfer learning and incremental learning both take pre... » read more

ML-based Routing Congestion And Delay Estimation In Vivado ML Edition
By Xilinx - 03 Nov, 2021 - Comments: 0

The FPGA physical design flow offers a compelling opportunity for Machine Learning for CAD (MLCAD) for the following reasons: • An ML solution can be applied wholesale to a device family. • There is a vast data farm that can be harvested from device models and design data from broad applications. • There is a single streamlined design flow that an be instrumented, annotated, and quer... » read more

What’s Missing For Designing Chips At The System Level
By Ed Sperling - 01 Nov, 2021 - Comments: 0

Semiconductor Engineering sat down to talk about design challenges in advanced packages and nodes with John Lee, vice president and general manager for semiconductors at Ansys; Shankar Krishnamoorthy, general manager of Synopsys' Design Group; Simon Burke, distinguished engineer at Xilinx; and Andrew Kahng, professor of CSE and ECE at UC San Diego. This discussion was held at the Ansys IDEAS co... » read more

HBM3: Big Impact On Chip Design
By Ann Mutschler - 14 Oct, 2021 - Comments: 0

An insatiable demand for bandwidth in everything from high-performance computing to AI training, gaming, and automotive applications is fueling the development of the next generation of high-bandwidth memory. HBM3 will bring a 2X bump in bandwidth and capacity per stack, as well as some other benefits. What was once considered a "slow and wide" memory technology to reduce signal traffic dela... » read more

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