tag: ReRAM

Power/Performance Bits: Aug. 25
By Jesse Allen - 25 Aug, 2020 - Comments: 0

AI architecture optimization Researchers at Rice University, Stanford University, University of California Santa Barbara, and Texas A&M University proposed two complementary methods for optimizing data-centric processing. The first, called TIMELY, is an architecture developed for “processing-in-memory” (PIM). A promising PIM platform is resistive random access memory, or ReRAM. Whil... » read more

Startup Funding: July 2020
By Jesse Allen - 05 Aug, 2020 - Comments: 0

A number of semiconductor and design companies took in funding this month, from a mega round for a data center switch maker to seed grants for two Canadian companies and new funding for an IP marketplace. China continues to be a hot area for electric vehicles, with one company raising half a billion for its two models currently in production. For July, we highlight fifteen startups that raised ... » read more

Manufacturing Bits: July 21
By Mark LaPedus - 21 Jul, 2020 - Comments: 1

Intel’s next-gen MRAM At the recent 2020 Symposia on VLSI Technology and Circuits, Intel presented a paper on a CMOS-compatible spin-orbit torque MRAM (SOT-MRAM) device. Still in R&D, SOT-MRAM is a next-generation MRAM designed to replace SRAM. Generally, processors integrate a CPU, SRAM and a variety of other functions. SRAM stores instructions that are rapidly needed by the processo... » read more

Challenges For Compute-In-Memory Accelerators
By Katherine Derbyshire - 18 Jun, 2020 - Comments: 1

A compute-in-memory (CIM) accelerator does not simply replace conventional logic. It's a lot more complicated than that. Regardless of the memory technology, the accelerator redefines the latency and energy consumption characteristics of the system as a whole. When the accelerator is built from noisy, low-precision computational elements, the situation becomes even more complex. Tzu-Hsian... » read more

Neuromorphic Computing Drives The Landscape Of Emerging Memories For Artificial Intelligence SoCs
By Synopsys - 03 Jun, 2020 - Comments: 0

The pace of deep machine learning and artificial intelligence (AI) is changing the world of computing at all levels of hardware architecture, software, chip manufacturing, and system packaging. Two major developments have opened the doors to implementing new techniques in machine learning. First, vast amounts of data, i.e., “Big Data,” are available for systems to process. Second, advanced ... » read more

Compute-In Memory Accelerators Up-End Network Design Tradeoffs
By Katherine Derbyshire - 21 May, 2020 - Comments: 0

An explosion in the amount of data, coupled with the negative impact on performance and power for moving that data, is rekindling interest around in-memory processing as an alternative to moving data back and forth between the memory and the processor. Compute-in-memory (CIM) arrays based on either conventional memory elements like DRAM and NAND flash, as well as emerging non-volatile memori... » read more

NVM Reliability Challenges And Tradeoffs
By Bryon Moyer - 13 Apr, 2020 - Comments: 0

This second of two parts looks at different memories and possible solutions. Part one can be found here. While various NVM technologies, such as PCRAM, MRAM, ReRAM and NRAM share similar high-level traits, their physical renderings are quite different. That provides each with its own set of challenges and solutions. PCRAM has had a fraught history. Initially released by Samsung, Micron, a... » read more

Memory Issues For AI Edge Chips
By Mark LaPedus - 23 Mar, 2020 - Comments: 3

Several companies are developing or ramping up AI chips for systems on the network edge, but vendors face a variety of challenges around process nodes and memory choices that can vary greatly from one application to the next. The network edge involves a class of products ranging from cars and drones to security cameras, smart speakers and even enterprise servers. All of these applications in... » read more

Scaling Up Compute-In-Memory Accelerators
By Katherine Derbyshire - 19 Mar, 2020 - Comments: 3

Researchers are zeroing in on new architectures to boost performance by limiting the movement of data in a device, but this is proving to be much harder than it appears. The argument for memory-based computation is familiar by now. Many important computational workloads involve repetitive operations on large datasets. Moving data from memory to the processing unit and back — the so-called ... » read more

Taming Novel NVM Non-Determinism
By Bryon Moyer - 10 Mar, 2020 - Comments: 1

New memory technologies may have non-deterministic characteristics that add calibration to the test burden — and may require recalibration during their lifetime. Many of these memories are in development as a result of the search for a storage-class memory (SCM) technology that can bridge the gap between larger, slower memories like flash and faster DRAM memory. There are several approache... » read more

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