tag: semiconductor packaging

Top Tech Talks Of 2018
By Linda Christensen - 31 Dec, 2018 - Comments: 0

2018 shaped up to be a year of transition and inflection, sometimes in the same design. There were new opportunities in automotive, continued difficulties in scaling, and an explosion in AI and machine learning everywhere. Traffic numbers on stories give a snapshot of the most current trends, but with videos those trends are even more apparent because of the time invested in watching those v... » read more

Packaging Biz Faces Challenges in 2019
By Mark LaPedus - 10 Dec, 2018 - Comments: 0

The IC packaging industry is bracing for slower growth, if not uncertainty, in 2019, even though advanced packaging remains a bright spot in the market. Generally, IC packaging houses saw strong demand in the first part of 2018, but the market cooled in the second half of the year due to a slowdown in memory. Going forward, the slower IC packaging market is expected to extend into the first ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 07 Dec, 2018 - Comments: 0

Fab tools/manufacturing Lam Research has accepted Martin Anstice’s resignation as chief executive and a member of the board. Lam has named Tim Archer as president and chief executive effective immediately. Archer, who served as Lam’s president and chief operating officer, has been named to the board. One analyst provided a comment on the situation at Lam. “In our view, Mr. Archer is very... » read more

Is The Stacked Die Ecosystem Stagnating?
By Ann Mutschler - 18 Dec, 2014 - Comments: 2

It is now widely agreed that not much has been happening in terms of adoption for 2.5D interposer and 3D ICs. “It seems like everyone is still at the starting line waiting for the race to begin," said Javier DeLaCruz, senior director of engineering of [getentity id="22242" e_name="eSilicon"]. "Interposer assembly and IP availability for effectively using the [getkc id="82" comment="2.5D IC... » read more

The Challenge Of Packaging
By Ann Mutschler - 13 Jan, 2011 - Comments: 0

Semiconductor packaging isn’t a sexy subject, and it’s one that’s been largely overlooked by the design community. Until now, that is. I recently spoke with Brad Griffin at Cadence, who stressed that managing the power through packages even on a single die is still one of the most challenging things engineers must navigate. “As people integrate more technology into a single chip o... » read more

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