tag: side channel attacks

Microarchitectural Defense Strategy Against EM Side-Channel Attacks (Northeastern Univ., Binghamton Univ.)
By Technical Paper Link - 20 Oct, 2025 - Comments: 0

A new technical paper titled "ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors" was published by researchers at Northeastern University and Binghamton University. Abstract "The run-time electromagnetic (EM) emanation of microprocessors presents a side-channel that leaks the confidentiality of the applications running on them. Ma... » read more

Why Anti-Tamper Sensors Matter: Delivering A Comprehensive Security Solution
By Raj Uppala - 09 Oct, 2025 - Comments: 0

If your device processes valuable data, controls a critical function, or connects to a wider network, it’s a target. Attackers don’t just try to break software; they increasingly physically tamper with hardware: probing, fault injecting, or opening enclosures to bypass protections and extract secrets. The consequences range from IP theft and fraud to orchestrated downtime across fleets ... » read more

Undervolting Attack That Exploits The Vulnerability Of Chips During Brownout Conditions (Worcester Polytechnic, RUB)
By Technical Paper Link - 15 Sep, 2025 - Comments: 0

A new technical paper titled "Chypnosis: Stealthy Secret Extraction using Undervolting-based Static Side-channel Attacks" was published by researcher at Worcester Polytechnic Institute and Ruhr University Bochum. Abstract: "Static side-channel analysis attacks, which rely on a stopped clock to extract sensitive information, pose a growing threat to embedded systems' security. To protect a... » read more

Physical Access Control Raises New Security Concerns
By Ann Mutschler - 27 Aug, 2025 - Comments: 0

Experts At The Table: Semiconductor Engineering sat down to discuss hardware security challenges, including fundamental security of GenAI, with Nicole Fern, principal security analyst at Keysight; Serge Leef, AI-For-Silicon strategist at Microsoft; Scott Best, senior director for silicon security products at Rambus; Lee Harrison, director of Tessent Automotive IC Solutions at Siemens EDA; Mohit... » read more

Security Verification In Semiconductor Development
By Shylaja Sen - 07 Aug, 2025 - Comments: 0

By Shylaja Sen and Mouadh Ayache As advanced chips become increasingly embedded in our daily lives, developers must remain vigilant about potential security vulnerabilities. On top of PPA (power, performance and area), the focus in semiconductor development has been on minimizing faults to reduce the possibility of failure in mission mode. No one wants an alpha particle to cause their autono... » read more

Security Tradeoffs: A Difficult Balance
By Ann Mutschler - 06 Aug, 2025 - Comments: 0

Experts At The Table: Semiconductor Engineering sat down to discuss hardware security challenges, including new threat models from AI-based attacks, with Nicole Fern, principal security analyst at Keysight; Serge Leef, AI-For-Silicon strategist at Microsoft; Scott Best, senior director for silicon security products at Rambus; Lee Harrison, director of Tessent Automotive IC Solutions at Sieme... » read more

AI: A New Tool For Hackers, And For Preventing Attacks
By Ann Mutschler - 08 Jul, 2025 - Comments: 0

Semiconductor Engineering sat down to discuss hardware security challenges, including new threat models from AI-based attacks, with Nicole Fern, principal security analyst at Keysight; Serge Leef, AI-For-Silicon strategist at Microsoft; Scott Best, senior director for silicon security products at Rambus; Lee Harrison, director of Tessent Automotive IC Solutions at Siemens EDA; Mohit Arora, seni... » read more

Security Vulnerabilities Difficult To Detect In Verification Flow
By Ann Mutschler - 26 Jun, 2025 - Comments: 0

As designs grow in complexity and size, the landscape for potential hackers to infiltrate a chip at any point in either the design or verification flow increases commensurately. Long considered to be a “safe” aspect of the design process, verification now must be a focus of chip developers from a security perspective. This also means the concept of trust has never been higher, and the tr... » read more

Cache Side-Channel Attacks On LLMs (MITRE, WPI)
By Technical Paper Link - 18 May, 2025 - Comments: 0

A new technical paper titled "Spill The Beans: Exploiting CPU Cache Side-Channels to Leak Tokens from Large Language Models" was published by researchers at MITRE and Worcester Polytechnic Institute. Abstract "Side-channel attacks on shared hardware resources increasingly threaten confidentiality, especially with the rise of Large Language Models (LLMs). In this work, we introduce Spill The... » read more

Cache Occupancy Attacks Targeting The SLC of Apple M-Series SoCs (Northeastern Univ.)
By Technical Paper Link - 11 May, 2025 - Comments: 0

A new technical paper titled "EXAM: Exploiting Exclusive System-Level Cache in Apple M-Series SoCs for Enhanced Cache Occupancy Attacks" was published by researchers at Northeastern University. Abstract "Cache occupancy attacks exploit the shared nature of cache hierarchies to infer a victim's activities by monitoring overall cache usage, unlike access-driven cache attacks that focus on spe... » read more

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