tag: Siemens EDA

The Many Flavors Of UPF: Which Is Right For Your Design?
By Madhur Bhargava - 11 Feb, 2021 - Comments: 0

Energy efficient electronic systems require sophisticated power management architectures that present difficult low-power verification challenges. Accellera introduced the Unified Power Format (UPF) standard in 2007 to help engineers deal with these complex issues. To keep pace with the growing complexity of low-power designs, the UPF standard has itself continued to evolve through the relea... » read more

The Problem With Benchmarks
By Brian Bailey - 11 Feb, 2021 - Comments: 1

Benchmarks long have been used to compare products, but what makes a good benchmark and who should be trusted with their creation? The answer to those questions is more difficult than it may appear on the surface, and some benchmarks are being used in surprising ways. Everyone loves a simple, clear benchmark, but that is only possible when the selection criteria are equally simple. Unfortuna... » read more

Using AWS Cloud Services For IC Library Characterization That Is Scalable, Secure, And Fast
By Siemens EDA - 10 Feb, 2021 - Comments: 0

Siemens’ AMS Verification team and Amazon Web Services (AWS) have collaborated to provide users with a scalable, secure and cost-effective cloud characterization flow that enables users to leverage cloud computing resources to accelerate library characterization, reduce compute resource bottlenecks, as well as improve characterization runtime predictability. To read more, click here. » read more

Blog Review: Feb. 10
By Jesse Allen - 10 Feb, 2021 - Comments: 0

Cadence's Paul McLellan finds out some of the pressing technological challenges and opportunities at the recent SEMI Industry Strategy Symposium, from the purity of gases and other materials used in semiconductor manufacturing to increasing cost and time-to-market pressures. Siemens EDA's Harry Foster examines trends in low power ASIC and IC design, including active management of power and t... » read more

Automotive Test Moves In-System
By Bryon Moyer - 09 Feb, 2021 - Comments: 1

With the electrification of automobiles, it’s not enough to test the new electronics thoroughly at the end of the manufacturing process. Safety standards now require that tests be performed live, in the field, with contingency plans should a test fail. “We see clear demand from the automotive semiconductor supply chain for design functionality specifically aimed at in-system monitoring,�... » read more

Four Steps To Resolving Reset Domain Crossing Data-Corruption In Automotive SoCs
By Kurt Takara - 04 Feb, 2021 - Comments: 0

By Kurt Takara (Siemens EDA), Ankush Sethi (NXP), and Aniruddha Gupta (NXP) Modern automotive SoCs typically contain multiple asynchronous reset signals to ensure systematic functional recovery from unexpected situations and faults. This complex reset architecture leads to a new set of problems such as possible reset domain crossing (RDC) issues. Conventional clock domain crossing (CDC) veri... » read more

Longer Chip Lifecycles Increase Security Threat
By Ed Sperling - 04 Feb, 2021 - Comments: 0

The longer chips and electronic systems remain in use, the more they will need to be refreshed with software and firmware updates. That creates a whole new level of security risks, ranging from over-the-air intercepts to compromised supply chains. These problems have been escalating as more devices are connected to the Internet and to each other, but it's particularly worrisome when it invol... » read more

Tessent LogicBIST With Observation Scan Technology
By Siemens EDA - 03 Feb, 2021 - Comments: 0

Meeting the ISO 26262 requirements for high quality and long-term reliability mans implementing on-chip safety mechanisms with high defect coverage of IC logic. This paper describes Observation Scan Technology, a new new logic built-in-self-test (BIST) technology that improves logic BIST test quality and reduces in-system test time. Empirical results demonstrate 90% test coverage with up to 10X... » read more

Blog Review: Feb. 3
By Jesse Allen - 03 Feb, 2021 - Comments: 0

Cadence's Paul McLellan listens in on the outlook from SEMI's recent Industry Strategy Symposium, which looked at the prospects for global recovery, the application areas where growth is expected, and how segments have recently performed. Siemens EDA's Harry Foster takes a look at trends in the adoption of languages and libraries for IC and ASIC designs and finds continued interest in System... » read more

Designing Low Energy Chips And Systems
By Ann Mutschler - 01 Feb, 2021 - Comments: 1

Energy optimization is beginning to shift left as design teams begin examining new ways to boost the performance of devices without impacting battery life or ratcheting up electricity costs. Unlike power optimization, where a skilled engineering team may reduce power by 1% to 5%, energy efficiency may be able to cut effective power in half. But those gains require a significant rethinking of... » read more

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