tag: Siemens EDA

Week In Review: Design, Low Power
By Jesse Allen - 23 Oct, 2020 - Comments: 0

M&A Microchip Technology acquired LegUp Computing, a provider of a high-level synthesis compiler that automatically generates high-performance FPGA hardware from software. The LegUp HLS tool will be used alongside Microchip’s VectorBlox Accelerator Software Design kit and VectorBlox Neural Networking IP generator to provide a complete front-end solution stack for C/C++ algorithm develope... » read more

Blog Review: Sept. 9
By Jesse Allen - 09 Sep, 2020 - Comments: 0

Mentor's Jacob Wiltgen considers the recent advances in safety critical engineering and how automated the lifecycle can become, where tools form a set of checks and balances to ensure the accuracy of results. Cadence's Paul McLellan finds out what's new at TSMC, including a new R&D center, fab construction, capacity increases for existing nodes, and what the company sees for beyond its N... » read more

Week In Review: Design, Low Power
By Jesse Allen - 28 Aug, 2020 - Comments: 0

Tools & IP Monozukuri unveiled its IC/Package co-design tool, GENIO. GENIO integrates existing silicon and package EDA flows to create full co-design and I/O optimization of complex multi-chip designs.  It works seamlessly across all existing EDA flows and comprises floor planning, I/O planning and end-to-end interconnect planning combined with cross-hierarchical pathfinding optimization.... » read more

Blog Review: Aug. 26
By Jesse Allen - 26 Aug, 2020 - Comments: 0

Cadence's Paul McLellan shares some highlights from Hot Chips, including the massive growth in deep learning models, the basics of designing neural network models, and challenges involved in different approaches. Mentor's Colin Walls explores memory management units, its job of translating an address used by the CPU to an alternative address, and why this remapping is desirable and useful. ... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 21 Aug, 2020 - Comments: 0

Pervasive computing — data center, edge, IoT SEMI formed a new standards committee to develop global standards for flexible hybrid electronics (FHE). The SEMI Standards Flexible Hybrid Electronics Global Technical Committee will develop FHE standards for design, materials, manufacturing, packaging and systems and to drive industry growth. IPC is also working on FHE standards as an industry s... » read more

Week In Review: Design, Low Power
By Jesse Allen - 14 Aug, 2020 - Comments: 0

Cadence added new machine learning functionality to its Xcelium Logic Simulator to speed verification closure on randomized regressions. Xcelium ML directly interfaces to the simulation kernel and learns iteratively over an entire simulation regression, guiding the Xcelium randomization kernel on subsequent regression runs to achieve matching coverage with reduced simulation cycles. Kioxia adop... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 07 Aug, 2020 - Comments: 0

Pervasive computing — data center, edge, IoT Codasip and Metrics Design Automation announced they have integrated Metrics’ SystemVerilog RTL Simulation Platform within Codasip’s SweRV Core Support Package, version, and it will be accessible on the cloud. Aldec’s TySOM Embedded Development Kits have qualified for Amazon Web Services (AWS) IoT Greengrass. TySOM is a family of Xilinx Z... » read more

Blog Review: July 22
By Jesse Allen - 22 Jul, 2020 - Comments: 0

In a video, Synopsys Chairman and co-CEO Aart de Geus discusses AI's computational wants, how 3DIC technology can infuse vitality into Moore’s Law and drive innovation for the semiconductor industry. Cadence's Paul McLellan looks back at the initial rise of digital cameras, the swift decline of the point-and-shoot as smartphones took over, and the development of increasingly complex CMOS i... » read more

DAC 2020 Day One
By Ann Mutschler - 21 Jul, 2020 - Comments: 0

DAC 2020 is like no other Design Automation Conference. It is virtual for this year — and hopefully only this year. The COVID pandemic has proven that face-to-face meetings and conferences are invaluable for many reasons. But with none of the distractions of a traditional conference, focusing on the content was easy. And because the sessions have been pre-recorded, the speakers for each se... » read more

Why Safety-Critical Verification Is So Difficult
By Ann Mutschler - 15 Jul, 2020 - Comments: 0

The inclusion of AI chips in automotive and increasingly in avionics has put a spotlight on advanced-node designs that can meet all of the ASIL-D requirements for temperature and stress. How should designers approach this task, particularly when these devices need to last longer than the applications? Semiconductor Engineering sat down to discuss these issues with Kurt Shuler, vice president of... » read more

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