Reducing Design Risk With Testbench Acceleration


Part 1 in a series of papers that demystify the performance of SystemVerilog and UVM testbenches when using an emulator for the purpose of hardware-assisted testbench acceleration. In these three papers, architectural and modeling requirements are described, followed by a recommended systematic approach for maximizing overall testbench acceleration speed-up and achieving your ultimate performan... » read more

Blog Review: June 29


Ansys' Justin Nescott checks out the world's first electric highway for trucking in this week's top five tech picks. Plus, some cool houses, Boston Dynamics' giraffe-bot, and a drum kit in a backpack. Applied's Matt Cogorno takes a look at the challenges facing etch methods as devices keep getting smaller. Synopsys' Apoorva Mathur digs into the energy efficient aspects of the MIPI M-PHY a... » read more

The Week In Review: Design


Tools & IP Synopsys uncorked PHY and Controller IP for PCI Express 4.0 architecture, which the company says reduces latency by up to 20% and area by 15% compared to the previous implementation. The IP supports lane margining to assess performance variation tolerance. PLDA announced a PCIe 4.0 development platform, and provides a PCIe 3.0-x8 (upstream) to PCIe 4.0-x4 (downstream) Integ... » read more

Pattern Matching In Test And Yield Analysis


By Jonathan Muirhead and Geir Eide It’s no secret that a successful yield ramp directly impacts integrated circuit (IC) product cost and time-to-market. Tools and techniques that help companies ramp to volume faster, while also reducing process and design variability, can be the difference between profit and loss in a competitive market. And while pattern matching technology has been aroun... » read more

Advanced Packaging Options, Issues


Systems in package are heading for the mass market in applications that demand better performance and lower power. As they do, new options for cutting costs are being developed to broaden the appeal of this approach as an alternative to shrinking features. Cost has been one of the big deterrents for widespread adoption of [getkc id="82" kc_name="2.5D"]. Initially, the almost universal compla... » read more

Blog Review: June 22


A Lam Research writer investigates the challenges that lie ahead for interconnects and whether current technologies will find new life or be replaced by new strategies. There's a greater force powering Moore's Law, says Cadence's Paul McLellan, who points to the vast amount of transistors being used for memory. Mentor's Robert Bates considers the challenges of securing in-hospital network... » read more

A Pattern Of Success: Calibre Pattern Matching


Calibre Pattern Matching allows you to define specific geometric configurations as visual patterns, directly from a design layout. With this visual representation, Calibre Pattern Matching opens up a whole new way to define design rules for both established and advanced nodes, and enables a wide range of innovative applications across design, verification, and test. This white paper introduces ... » read more

Photonics Moves Closer To Chip


Silicon photonics is resurfacing after more than a decade in the shadows, driven by demands to move larger quantities of data faster, using extremely low power and with minimal heat. Until recently, much of the attention in photonics focused on moving data between servers and storage. Now there is growing interest at the PCB level and in heterogeneous multi-chip packages. Government, academi... » read more

The Week In Review: IoT


M&A Samsung Electronics will buy Joyent, a provider of public and private cloud services. The Korean company said the purchase will give Samsung a cloud platform for the Internet of Things, mobile devices, and cloud-based software and services. “Samsung brings us the scale we need to grow our cloud and software business, an anchor tenant for our industry leading Triton container-as-a-ser... » read more

The Week In Review: Design


Tools Synopsys uncorked the latest version of its software for the design of optical communication systems and photonic integrated circuits at the signal propagation level, adding a new interface and expanding the software's application design libraries. Mentor Graphics said it would provide a variety of tools to support the new Zynq UltraScale+ MPSoC devices from Xilinx, dual-core field-... » read more

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