Week In Review: Design, Low Power


ANSYS will acquire Dynardo, a provider of simulation process integration and design optimization (PIDO) technology. Dynardo's tools include algorithms for optimization, uncertainty quantification, robustness, scenario variation, sensitivity analysis, simulation workflow building and data mining. Based in Weimar, Germany, Dynardo was founded in 2001 and has been an ANSYS software partner; the ac... » read more

RISC-V Challenges And Opportunities


Semiconductor Engineering sat down to discuss open instruction set hardware and the future of RISC-V with Ben Levine, senior director of product management in Rambus' Security Division; Jerry Ardizzone, vice president of worldwide sales at Codasip; Megan Wachs, vice president of engineering at SiFive; and Rishiyur Nikhil, CTO of Bluespec. What follows are excerpts of that conversation. (L-... » read more

ML, Edge Drive IP To Outperform Broader Chip Market


The market for third-party semiconductor IP is surging, spurred by the need for more specific capabilities across a wide variety of markets. While the IP industry is not immune to steep market declines in semiconductor industry, it does have more built-in resilience than other parts of the industry. Case in point: The top 15 semiconductor suppliers were hit with an 18% decline in 2019 first-... » read more

June’19 Startup Funding


During the month of June, there were 15 startups that brought in funding rounds of $100 million or more, as investors continued to chase deals in cybersecurity, automotive technology, semiconductors, and a variety of services. There were no billion-dollar deals as spring slid into summer; yet, those 15 companies together raised a total of about $3.13 billion. Aurora Innovation, the developer... » read more

Will Open-Source EDA Work?


Open-source EDA is back on the semiconductor industry's agenda, spurred by growing interest in open-source hardware. But whether the industry embraces the idea with enough enthusiasm to make it successful is not clear yet. One of the key sponsors of this effort is the U.S. Defense Advanced Research Projects Agency (DARPA), which is spearheading a number of programs to lower the cost of chip ... » read more

Week In Review: Design, Low Power


ON Semiconductor completed its $946 million acquisition of Quantenna Communications, a San Jose-based company that specializes in Wi-Fi chips and software. Aldec introduced automatic UVM register generation to its Riviera-PRO verification platform. Riviera-PRO can now accept a CSV file or IP-XACT register description as an input and, working at the Register Abstraction Layer (RAL) of UVM, ou... » read more

Week In Review: Design, Low Power


M&A Infineon Technologies will acquire Cypress Semiconductor for $23.85 per share in cash, or $10.1 billion. The deal will place Infineon as the number eight chip manufacturer in the world based on 2018 revenues and create an automotive powerhouse, making the combined company the largest supplier of chips to the automotive market. Infineon sees potential to reach into new industrial and co... » read more

Week In Review: Design, Low Power


M&A Marvell will acquire Avera Semiconductor, the ASIC business of GlobalFoundries, for $650 million in cash at closing plus an additional $90 million in cash if certain business conditions are satisfied within the next 15 months. The agreements include transfer of Avera's revenue base, strategic design wins with infrastructure OEMs, and a new long-term wafer supply agreement between Globa... » read more

Creating A Roadmap For Hardware Security


The U.S. Department of Defense and private industry consortiums are developing comprehensive and cohesive cybersecurity plans that will serve as blueprints for military, industrial and commercial systems. What is particularly noteworthy in all of these efforts is the focus on semiconductors. While software can be patched, vulnerabilities such as Spectre, Meltdown and Foreshadow need to be de... » read more

Week In Review: Design, Low Power


IP Flex Logix debuted its new InferX X1 edge inference co-processor, which incorporates the interconnect technology from its eFPGAs and its inference-optimized nnMAX clusters. The chip focuses on high throughput in edge applications with a single DRAM and is optimized for small batch sizes in edge applications where there is typically only one camera/sensor. InferX X1 will be available as chip... » read more

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