Blog Review: April 8


Synopsys' Taylor Armerding shares some tips for getting development, security, and operations teams communicating effectively and working toward a single purpose. Cadence's Paul McLellan looks back over computing history to how the best way to deliver computing resources has shifted from cloud to edge and back again. Mentor's Shivani Joshi shares an overview of flexible PCB designs and wh... » read more

The Need For Traceability In Auto Chips


Someday your car will drive itself to a repair shop for a recall using a scheduling application that is both efficient and can prioritize which vehicles need to be fixed first. But that's still a ways off. Proactive identification of issues is not yet available. To be ready for that, today’s data analytics systems need to begin supporting targeted recalls, enabling predictive maintenance a... » read more

Week In Review: Auto, Security, Pervasive Computing


Synopsys has added nanoscale and macroscale illumination optics to its RSoft Photonic Device Tools version 2020.03. ARVR designers can use the RSoft-LightTools Bidirectional Scattering Distribution Function (BSDF) interface to make interpolated BSDF files for optimized nanoscale and macroscale optics, such as freeform optical prism projectors, eye tracking technologies, and optical planar waveg... » read more

Tracking Automotive’s Rapidly Shifting Ecosystem


The automotive ecosystem is becoming much harder to navigate as automakers, Tier 1s and IP vendors redefine their relationships based upon shifting value caused by an rapidly expanding amount of increasingly interdependent and complex electronic content. Predictions of massive change started almost a decade ago with a number of pilot programs around autonomous vehicles. But those shifts real... » read more

New Ways To Optimize Machine Learning


As more designers employ machine learning (ML) in their systems, they’re moving from simply getting the application to work to optimizing the power and performance of their implementations. Some techniques are available today. Others will take time to percolate through the design flow and tools before they become readily available to mainstream designers. Any new technology follows a basic... » read more

Security Verification For Processor-Based SoCs


By Ruud Derwig and Nicole Fern Security in modern systems is of utmost importance. Device manufacturers are including multiple security features and attack protections into both the hardware and software design. End-product system security, however, cannot be guaranteed by using a secure processor alone. The final product security results not only from using proven, secure hardware component... » read more

Building Security IntoThe DevOps Life Cycle


The primary goal when breaking the build in the CI/CD DevOps life cycle is to treat security issues with the same level of importance as quality and business requirements. If quality or security tests fail, the continuous integration server breaks the build. When the build breaks, the CI/CD pipeline also breaks. Based on the reason for the broken build, appropriate activities such as archite... » read more

Blog Review: April 1


Rambus' Steven Woo takes an in-depth look at on-chip memory for high performance AI applications and explores some of the primary differences between HBM and GDDR6. Synopsys' Taylor Armerding warns of the risks of legacy vulnerabilities, where software has problems that were never fixed then forgotten about or never discovered in the first place, and key steps for finding and addressing them... » read more

Week In Review: Auto, Security, Pervasive Computing


AI/Edge The United States now has the highest number of COVID-19 cases, and the state governments in the U.S. are asking technologists for help, according to a story in The Washington Post. Data scientists, software developers, and others are needed to help. New York State started a Technology SWAT team calling for help from the tech community. Intel AI Builder program participant DarwinAI ... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys debuted VIP and a UVM source code test suite for IP supporting Ethernet 800G. The VIP supports DesignWare 56G Ethernet, 112G Ethernet, and 112G USR/XSR PHYs for FinFET processes, which can be integrated for 800G implementations based on 8 lane x 100 Gb/s technology. The VIP can switch speed configurations dynamically at run time and includes a customizable set of frame ... » read more

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