tag: Synopsys

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 31 Aug, 2018 - Comments: 1

Internet of Things Electrolux, Haier, LG Electronics, and Samsung Electronics announced they are working with the Open Connectivity Foundation, an Internet of Things standards body, to build, commercialize, and deploy interoperable OCF-Certified connected products during 2019. In addition, the OCF is launching an enhanced security model and secure cloud management capabilities, making use of p... » read more

Week In Review: Design, Low Power
By Jesse Allen - 31 Aug, 2018 - Comments: 0

Synopsys unveiled a new formal app, Regression Mode Accelerator, which uses machine learning algorithms to speed up formal property verification, as well as better convergence of formal proofs for subsequent runs. According to Synopsys, the app also allows for significant saving of compute resources in nightly regressions. Hitachi used OneSpin Solutions' 360 EC product family to verify vCOSS... » read more

Variation In Low-Power FinFET Designs
By Ann Mutschler - 30 Aug, 2018 - Comments: 1

One of the biggest advantages of moving to the a leading edge process node is ultra-low voltage operation, where devices can achieve better performance using less power. But the latest generation process nodes also introduce a number of new challenges due to increased variation that can affect everything from signal integrity to manufacturing yield. While variation is generally well understo... » read more

Blog Review: Aug. 29
By Jesse Allen - 29 Aug, 2018 - Comments: 0

Mentor's Joe Hupcey III addresses inconclusive results in formal verification with tips on how to reduce the complexity of “assumption” properties to make them easier for the formal engines to digest and reach a solution. Cadence's Meera Collier looks beyond the immediate appeal of autonomous cars to the broader social implications of urban sprawl, public transit funding, and gentrificat... » read more

UPF-Aware Clock-Domain Crossing
By Ed Sperling - 29 Aug, 2018 - Comments: 0

Synopsys’ Namit Gupta talks with Semiconductor Engineering about low-power design techniques at the most advanced process nodes, including how to verify the impact of CDC on power at the register transfer level, how to avoid bugs caused by the post-RTL insertion of low-power devices such as isolation, retention and level shifters. https://youtu.be/HwRe9DHLfmg » read more

Week In Review: Design, Low Power
By Jesse Allen - 24 Aug, 2018 - Comments: 0

Wafer company Soitec and European missile manufacturer MBDA joined together to buy the assets of Dolphin Integration. The IP and EDA tool provider, founded in 1985 in Grenoble, France, has been struggling, recently concluding insolvency proceedings and going into receivership. The new joint venture will absorb Dolphin's 155 employees and be owned 60% by Soitec, 40% by MBDA. The two companies co... » read more

Is Synthesis Still Process-Independent?
By Bernadette Mortell - 23 Aug, 2018 - Comments: 0

For many years, the idea that the release of a new process node from one of the major silicon foundries would require you to update your synthesis flow was a non-starter. Synthesis used the available timing, area and power models in the libraries and that was the beginning and end of the discussion. With the arrival of physical synthesis, physical effects could be taken into consideration in... » read more

Big Changes For Mainstream Chip Architectures
By Ed Sperling - 23 Aug, 2018 - Comments: 3

Chipmakers are working on new architectures that significantly increase the amount of data that can be processed per watt and per clock cycle, setting the stage for one of the biggest shifts in chip architectures in decades. All of the major chipmakers and systems vendors are changing direction, setting off an architectural race that includes everything from how data is read and written in m... » read more

Choosing The Right Illumination Design Software
By Synopsys - 22 Aug, 2018 - Comments: 0

As a decision maker responsible for making the right choices for your company’s bottom line, which optical design software should you choose? If the performance or cost of your illumination subsystem is critical to the success of your products, the answer is LightTools. LightTools will increase your engineering productivity, enable faster time to market, and provide your products the competit... » read more

Blog Review: Aug. 22
By Jesse Allen - 22 Aug, 2018 - Comments: 0

Cadence's Paul McLellan considers how much further we need to go to make EUV work for 5nm, the problem of cost, and ASML's EUV roadmap. In a video, Mentor's Colin Walls explains optimizing data in embedded software with a simple example of two ways to put data in memory and how to decide which is best. Synopsys' Fred Bals provides a rundown of the different types of application security t... » read more

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