tag: Synopsys

Blog Review: Dec. 17
By Ed Sperling - 17 Dec, 2014 - Comments: 0

Ansys' Bill Vandermark unearths the top five engineering articles for this week. Check out the ship-based laser weapon used to destroy drones. There's also a product called The Sphere that allows you to do strange things like answer the phone by tapping on the refrigerator. Bet you didn't think of that one. Cadence's Steve Carlson lists the top five things that can go wrong in mixed signal ... » read more

Hybrid Verification: The Only Way Forward
By Brian Bailey - 15 Dec, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="10" kc_name=" functional verification"]. The inability of RTL [getkc id="11" kc_name="simulation"] to keep up with verification needs is causing rapid change in the industry. Taking part in the discussion are Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Janick Bergeron, fe... » read more

The Week In Review: Design/IoT
By Ed Sperling - 12 Dec, 2014 - Comments: 0

Tools Cadence rolled out a use-case scenario verification tool that automates some test development that has been done manually in the past. The new tool accelerates development of software-driven tests and debug to ferret out complex SoC-level bugs. Cadence claims a 10X productivity improvement. Mentor Graphics uncorked a new version of its verification IP for PCI Express. The new IP decre... » read more

Yield Ramp Challenges Increase
By Ann Mutschler - 11 Dec, 2014 - Comments: 0

As semiconductor manufacturing moves down to smaller process nodes, there’s no doubt that it is increasingly difficult to ramp both test and manufacturing yields. One reason for this is simply scale. Smaller nodes translate into more steps and greater complexity in the manufacturing process, with attendant process variations. “Smaller process nodes increase the amount of embedded mem... » read more

Blog Review: Dec. 10
By Ed Sperling - 10 Dec, 2014 - Comments: 1

ARM's Brad Nemire takes a look at a variety of the latest smart devices. Check out the intelligent frying pan that tells you the temperature, the amount of time needed to cook something, and when it's done. Check out the "Homey," too. You can now give verbal commands to your home. Just don't tell it to roll over. Who needs paper? Or more accurately, who needs more than one sheet of paper—e... » read more

The Week In Review: Design/IoT
By Ed Sperling - 05 Dec, 2014 - Comments: 0

Tools Calypto rolled out its third-generation high-level synthesis platform after three years of development, adding granular control over which regions are optimized and the ability to work top-down and bottom-up—basically allowing designers to zoom in and out as needed. In addition, the tool has a 10X increase in capacity and supports SystemC and C++. eSilicon unveiled its online conf... » read more

Signal And Power Integrity Cross Paths
By Ed Sperling - 05 Dec, 2014 - Comments: 2

Signal integrity and power integrity historically have been relatively independent issues, and engineers with expertise in one area generally operate independently of the other. But as more power domains are added to conserve energy and allow more features, as voltages are reduced to save battery life, and as dynamic power becomes more of a concern at advanced nodes, these worlds are suddenly m... » read more

Problems Lurk In SoC Boundaries
By Brian Bailey - 04 Dec, 2014 - Comments: 0

Interfaces always have been a problem, because only rarely does anyone have responsibility for them. Responsibilities generally are tied to functional blocks with the prevailing notion that if all blocks do the right thing, they will also behave correctly when brought together. Design teams that believe this eventually find out the fallacy of this assumption. To make matters worse, these are of... » read more

An Architectural Choice Overdue For Change
By Brian Bailey - 04 Dec, 2014 - Comments: 0

The past appears to be a lot simpler than the present and when we look into the future, the right decisions often look highly uncertain. This is the value of hindsight, but also includes the notion that the winner gets to write history. What semiconductors look like today could have been very different if different decisions had been made 20 years ago. What if the industry had adopted a paralle... » read more

IP Power Models Enable Energy-Aware System-Level Design
By Alan Gibbons - 04 Dec, 2014 - Comments: 0

Energy efficiency is one of the primary design metrics for heterogeneous multi-core mobile platforms, and the very real threat of dark silicon reinforces the fact that we must manage energy consumption in these platforms intelligently. The way in which a platform is used absolutely determines how much energy it consumes, so we need to take a holistic approach to energy management. Furthermo... » read more

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