Architecting For Optimal Interface IP Integration


Semiconductor Engineering sat down to discuss the design and integration of complex interface IP with Ty Garibay, VP of engineering at Altera; Brian Daellenbach, president of Northwest Logic; Frank Ferro, senior director of product management for memory and interface IP at Rambus; Saman Sadr, director of analog design at Semtech; and Navraj Nandra, senior director of marketing for analog/mixed ... » read more

Power Limits Apps In The IoT


The applications in the IoT are seemingly limitless, but the power is one thing that can’t be. Mary Ann White at Synopsys reminded me that a lot of the energy harvesting devices are super low power and there is a reason why they use just a simple LCD-type display. But we agree it would be so cool if we could have color LCDs that still only consume low power. Of course, I have no doubt tha... » read more

Virtual Prototyping Takes Off


Semiconductor Engineering sat down to discuss [getkc id="104" kc_name="virtual prototyping"] with Barry Spotts, senior core competency FAE for fabric and tools at [getentity id="22186" comment="ARM"]; Vasan Karighattam, senior director of architecture for SoC and SSW engineering at [getentity id="22664" e_name="Open-Silicon"]; Tom De Schutter, senior product marketing manager for Virtualizer So... » read more

Blog Review: Dec. 3


Mentor's Robin Bornoff zeroes in on some of the biggest and most frustrating causes of energy loss—the ones that have nothing to do with the intended task. In electronics, it's a question of how much power is consumed pushing around electrons and photons. Cadence's Richard Goering follows a panel discussion about whether we're really making progress in low-power design, where the challeng... » read more

Real-Time Trace: A Better Way To Debug Embedded Applications


Firmware and application software development is often the critical path for many embedded designs. Problems that appear in the late phases of the development can be extremely difficult to track down and debug, thus putting project schedules at risk. Traditional debug techniques cannot always help to localize the issue. This white paper shows the benefits of debugging with ‘real-time trace’... » read more

Hybrid Verification: The Only Way Forward


Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="10" kc_name=" functional verification"]. The inability of RTL [getkc id="11" kc_name="simulation"] to keep up with verification needs is causing rapid change in the industry. Taking part in the discussion are Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Janick Bergeron, fe... » read more

Blog Review: Nov. 26


Mentor's Nazita Saye has stumbled on a defibrillating drone that can rescuscitate victims well before emergency services arrive. That's a new one. ARM's Brad Nemire has found an interesting new Kickstarter device, too. It measures everything from heart beat to body posture with earlobe sensors. Cadence's Brian Fuller follows a speech by economist Austan Goolsbee, who is optimistic about t... » read more

Filling In The Gaps For Mixed-Signal Verification


Semiconductor Engineering sat down to discuss mixed-signal verification with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" e_name="Synopsys"]. What follows are excerpts of th... » read more

The Week In Review: Design/IoT


IoT The first test drive to showcase intelligent traffic was held in Europe this week. NXP, Siemens, Honda, Cohda Wireless, TÜV Süd, and Automobile Clubs AvD and ANWB are all working within the Intelligent Transport Systems Corridor that runs between Austria, German and the Netherlands. IP Open-Silicon rolled out memory controller IP for the Hybrid Memory Cube 2.0 standard. The 3D stacke... » read more

The Internet Of Cores


Ever since the birth of the third-party [getkc id="43" comment="IP"] market, there has been a desire for plug-and-play compatibility between cores. Part of the value proposition of reuse is that a block has been used before, and has been verified and validated by having been implemented in silicon. By re-using the core, many of these tasks no longer land on the [getkc id="81" kc_name="SoC"] dev... » read more

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