Week In Review: Design, Low Power


Synopsys will acquire QTronic GmbH, a provider of simulation, test tools, and services for automotive software and systems development. Based in Germany, QTronic was founded in 2006 and makes a virtual ECU platform as well as a test automation solution with test case generator. Terms of the deal were not disclosed. VeriSilicon uncorked VIP9000, a highly scalable and programmable processor fo... » read more

Week In Review: Manufacturing, Test


Chipmakers TSMC posted mixed results for the second quarter. It also presented a mixed outlook for the third quarter, according to various reports. TSMC and Samsung are in the midst of a foundry battle at 7nm and 5nm. “TSMC raised its 2019 capex outlook to over $11B, up from prior guidance of $10B-$11B. The increased capex is to support 5nm and 7nm ramps, with accelerated 5G investment a... » read more

Week in Review: IoT, Security, Auto


Internet of Things AT&T reports the activation of its narrowband Internet of Things network in the U.S. The carrier upgraded its 4G LTE cell sites across the country. It now offers two low-power wide-area networks to business customers, including its LTE-M network in Mexico and the U.S. “Both networks are designed for the IoT within licensed spectrum and provide carrier-grade security,... » read more

Week In Review: Design, Low Power


ANSYS acquired the assets of DfR Solutions, a developer of automated design reliability analysis software. Founded in 2004 and based in Maryland, DfR's tool translates ECAD and MCAE data into 3D finite element models, automates thermal derating and performs thermal and mechanical analysis of electronics earlier in the design cycle. "ANSYS brings industry-leading electronic simulation capabiliti... » read more

Week In Review: Manufacturing, Test


Chipmakers A U.S. federal grand jury has indicted Chinese DRAM maker Jinhua Integrated Circuit Co. (JHICC), Taiwan's UMC and three individuals, charging them with alleged crimes related to a conspiracy to steal, convey, and possess stolen trade secrets from Micron Technology for the benefit of a company controlled by the China government. In addition, the U.S. filed a civil lawsuit seeking... » read more

The Week In Review: Design


M&A GlobalFoundries formed Avera Semiconductor, a wholly-owned subsidiary focused on custom ASIC designs. While Avera will use its relationship with GF for 14/12nm and more mature technologies, it has a foundry partnership lined up for 7nm. The new company's IP portfolio includes high-speed SerDes, high-performance embedded TCAMs, ARM cores and performance and density-optimized embedded SR... » read more

The Week In Review: Design


Tools Synopsys debuted new versions of its circuit simulation and custom design products. FineSim SPICE provides 2X faster simulation and Monte Carlo analysis speed, CustomSim FastSPICE offers 2X speed-up for post-layout SRAM simulation and maintains multi-core scalability by providing additional 2X speed-up on four cores, and HSPICE delivers 1.5X speed-up for large post-layout designs, accord... » read more

The Week In Review: Manufacturing


Market research SEMI has released its mid-year forecast at Semicon West. SEMI reported that worldwide sales of new semiconductor manufacturing equipment are projected to increase by 19.8% to a total of $49.4 billion in 2017, marking the first time that the semiconductor equipment market has exceeded the market high of $47.7 billion set in 2000. In 2018, 7.7% growth is expected, resulting in an... » read more

The Week In Review: Manufacturing


Chipmakers Toshiba and its fab partner, Western Digital, have jointly rolled out a 96-layer 3D NAND product amid a legal dispute. The companies have developed prototype samples of a 96-layer 3D NAND device. Samples of the new 96-layer product, which is a 256 gigabit (32 gigabytes) device, is scheduled for release in the second half of 2017 and mass production is targeted for 2018. Separately, ... » read more

The Week In Review: Design


Tools Mentor released new software for automated set-up of PCB DFT rules. The tool extracts relevant PCB design technology from the design data to determine the correct PCB technology classification, then maps the PCB classification to the constraints associated with the applicable manufacturing processes to run only the checks necessary for the design. IP Synopsys improved the convolu... » read more

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