Multi-Patterning Issues At 7nm, 5nm


Continuing to rely on 193nm immersion lithography with multiple patterning is becoming much more difficult at 7nm and 5nm. With the help of various resolution enhancement techniques, optical lithography using a deep ultraviolet excimer laser has been the workhorse patterning technology in the fab since the early 1980s. It is so closely tied with the continuation of [getkc id="74" comment="Mo... » read more

Can We Measure Next-Gen FinFETs?


After ramping up their respective 16nm/14nm finFET processes, chipmakers are moving towards 10nm and/or 7nm, with 5nm in R&D. But as they move down the process roadmap, they will face a new set of fab challenges. In addition to lithography and interconnects, there is metrology. Metrology, the science of measurements, is used to characterize tiny films and structures. It helps to boost yi... » read more

The Week In Review: Manufacturing


Chipmakers Next month, GlobalFoundries will host a job fair in Portland, Ore., according to reports. The company hopes to hire former Intel workers. These are workers who lost their jobs as part of Intel's recent layoff. Anokiwave, a developer of chips for the mmWave market, has announced a foundry alliance with GlobalFoundries. GlobalFoundries will make so-called Silicon Core chips on a f... » read more

Why EUV Is So Difficult


For years, extreme ultraviolet (EUV) lithography has been a promising technology that was supposed to help enable advanced chip scaling. But after years of R&D, EUV is still not in production despite major backing from the industry, vast resources and billions of dollars in funding. More recently, though, [gettech id="31045" comment="EUV"] lithography appears to be inching closer to pos... » read more

Bringing Advanced Semiconductor Manufacturing Technologies To Higher Education


Universities and other institutions of higher learning play a key role in developing our next generation of semiconductor technologies. Along with the theory of semiconductor technology, our next generation of scientists and engineers must learn about the practical methods used to design and manufacture the latest generation of semiconductor products. Recently, Coventor’s predictive, 3D proce... » read more

The Week In Review: Manufacturing


Samsung Austin Semiconductor plans to invest more than $1 billion in its fab in Austin, Texas. Today, the fab continues to ramp up the company’s 14nm finFET technology. At the same time, Samsung is expanding its advanced finFET foundry process technology offerings with its fourth-generation 14nm process (14LPU) and its third-generation 10nm technology (10LPU). Graphcore is developing a so-... » read more

Achieving The Vision Of Silicon Photonics Processing


With the increasing need for faster data transfer rates, the transition from electrical to optical signaling in data processing is inevitable. Copper cabling cannot keep up with the upcoming data center bandwidth requirements for applications such as multimedia streaming and high performance computing. One technology that could enable true optical communication is silicon photonics. Silicon is ... » read more

What Happened To Inverse Lithography?


Nearly 10 years ago, the industry rolled out a potentially disruptive technique called inverse lithography technology (ILT). But ILT was ahead of its time, causing the industry to push out the technology and relegate it to niche-oriented applications. Today, though, ILT is getting new attention as the semiconductor industry pushes toward 7nm, and perhaps beyond. ILT is not a next-generation ... » read more

FinFET Front-End-of-Line (FEOL) Process Integration With SEMulator3D


Purely geometric scaling of transistors ended around the 90-nanometer (nm) era. Since then, most power/performance and area/cost improvements have come from structural and material innovations. Silicon-on-Insulator (SOI), first “partially depleted” and more recently “fully depleted” as well as embedded stressors, High-K / Metal-Gate (HKMG) and now FinFETs are examples of technology inno... » read more

Design Process Technology Co-Optimization For Manufacturability


Yield and cost have always been critical factors for both manufacturers and designers of semiconductor products. Meeting yield and product cost targets is a continuous challenge, due to new device structures and increasingly complex process innovations introduced to achieve improved product performance at each new technology node. Design for manufacturability (DFM) and design process technology... » read more

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