tag: Lam Research

Why Chiplets Are So Critical In Automotive
By John Koon - 20 Feb, 2024 - Comments: 1

Chiplets are gaining renewed attention in the automotive market, where increasing electrification and intense competition are forcing companies to accelerate their design and production schedules. Electrification has lit a fire under some of the biggest and best-known carmakers, which are struggling to remain competitive in the face of very short market windows and constantly changing requir... » read more

Blog Review: Feb. 7
By Jesse Allen - 07 Feb, 2024 - Comments: 0

Synopsys' Ian Land, Kenneth Larsen, and Rob Aitken find that a new approach will be required to ensure that higher volume 3D heterogeneous integration (3DHI) designs can function reliably and successfully in aerospace, defense, and government systems. Siemens' John Golding provides a primer on the fundamental concepts related to signal integrity, including key topics such as transmission lin... » read more

Fan-Out Panel-Level Packaging Hurdles
By Anne Meixner - 24 Jan, 2024 - Comments: 0

Fan-out panel-level packaging (FOPLP) promises to significantly lower assembly costs over fan-out wafer-level packaging, providing the relevant processes for die placement, molding and redistribution layers (RDLs) formation can be scaled up with equivalent yield. There is still much work to be done before that happens. Until now, FOPLP has been adopted for devices that are manufactured in ve... » read more

Navigating Heat In Advanced Packaging
By Gregory Haley - 18 Jan, 2024 - Comments: 0

The integration of multiple heterogeneous dies in a package is pivotal for extending Moore’s Law and enhancing performance, power efficiency, and functionality, but it also is raising significant issues over how to manage the thermal load. Advanced packaging provides a way to pack more features and functions into a device, increasingly by stacking various components vertically rather than ... » read more

Developing ReRAM As Next Generation On-Chip Memory For Machine Learning, Image Processing And Other Advanced CPU Applications
By Brett Lowe - 18 Jan, 2024 - Comments: 0

In modern CPU device operation, 80% to 90% of energy consumption and timing delays are caused by the movement of data between the CPU and off-chip memory. To alleviate this performance concern, designers are adding additional on-chip memory to their CPUs. Traditionally, SRAM has been the most widely used on-chip CPU memory type. Unfortunately, SRAM is currently limited to a size of hundreds of ... » read more

Fabs Begin Ramping Up Machine Learning
By Anne Meixner - 19 Dec, 2023 - Comments: 0

Fabs are beginning to deploy machine learning models to drill deep into complex processes, leveraging both vast compute power and significant advances in ML. All of this is necessary as dimensions shrink and complexity increases with new materials and structures, processes, and packaging options, and as demand for reliability increases. Building robust models requires training the algorithms... » read more

Proprietary Vs. Commercial Chiplets
By Ed Sperling - 19 Dec, 2023 - Comments: 0

Large chipmakers are focusing on chiplets as the best path forward for integrating more functions into electronic devices. The challenge now is how to pull the rest of the chip industry along, creating a marketplace for third-party chiplets that can be chosen from a menu using specific criteria that can speed time to market, help to control costs, and behave as reliably as chiplets developed in... » read more

Improving Semiconductor Yield Using Large Area Analysis
By Jacky Huang - 19 Dec, 2023 - Comments: 0

Design rule checking (DRC) is a technique used during chip design to ensure that a device can successfully be manufactured at high yield. Design rules are established based on the limits and variability of equipment and process technologies in use. DRC checking ensures that a design meets manufacturing requirements and will not result in a chip failure or DRC “violation.” Common DRC rules i... » read more

Important Process Parameter And Its Sensitivity Check By Virtual Fabrication: Channel Hole Profile Impact On Advanced 3D NAND Structure
By Coventor - 19 Dec, 2023 - Comments: 0

A virtual DOE-based process sensitivity check was performed for two tiers of channel holes in a 3D NAND device. The channel hole tilt distance, twist angle, and their sensitivities to the visible area in silicon-oxide-nitride-oxide (SONO) punch process were analyzed. The results show that controlling the upper tilt distance is more important for offering a larger visible area. Also, a negative ... » read more

Chip Industry Week In Review
By The SE Staff - 15 Dec, 2023 - Comments: 0

By Jesse Allen, Gregory Haley, and Liz Allan Synopsys acquired Imperas, pushing further into the RISC-V world with Imperas' virtual platform technology for verifying and emulating processors. Synopsys has been building up its RISC-V portfolio, starting with ARC-V processor IP and a full suite of tools introduced last month. The first high-NA EUV R&D center in the U.S. will be built at... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy