category: Blogs – LPHP

category: Auto, Security & Edge AI

Low-Power Solutions At DAC
By Bhanu Kapoor - 16 Jun, 2011 - Comments: 0

By Bhanu Kapoor Power is the main driver of semiconductor process technology related advances recently. One would expect a similar focus in the electronic design automation industry to help designers implement low power designs. However, the latest DAC in San Diego didn’t give the impression that the EDA industry is thinking likewise, perhaps with the exception of verification aspects of low... » read more

Physical Effects Affecting Design
By Ann Mutschler - 16 Jun, 2011 - Comments: 0

With the increase in analog content in today’s designs, the industry is facing a real challenge in terms of how to perform mixed-signal verification at the functional level, at the SPICE level and down to physical implementation of the DRC rules. Joseph Davis, product manager for Calibre interactive and integration products at Mentor Graphics, explained there are three things driving what�... » read more

EDA…Or Something Else?
By Atrenta - 26 May, 2011 - Comments: 0

The Design Automation Conference is almost here. That major focal point for the EDA industry where we gather to explain the present, predict the future, have a bunch of serious meetings and maybe a little fun, too. Some companies will stage an incremental update of their strategy and others will outline a major new strategy. This year, Atrenta will be talking strategy, with some announcement... » read more

Top 5 Reasons For Power Delivery Failure
By Matt Elmore - 12 May, 2011 - Comments: 0

By Matt Elmore Technology scaling has brought with it a myriad of causes for power delivery network (PDN) failure. Even a few years ago, it was simply enough to run static and dynamic power analysis to expose any voltage drops caused by weak power routing. No one cared about modeling the package and PCB. To account for clock jitter, you could simply throw in a whole nanosecond of clock uncerta... » read more

The Real Value Of An LP Methodology
By Luke Lang - 12 May, 2011 - Comments: 0

By Luke Lang “What are some of the low-power mistakes that you have seen?” That is, by far, the most popular question asked by designers. And it’s a very good question. Why re-invent the wheel? Why repeat mistakes? It’s a lot easier to learn from someone else’s mistakes than from your own. Clearly, every company is different, and every design is different. But there are lots of co... » read more

Intel’s New Machine
By Barry Pangrle - 12 May, 2011 - Comments: 0

By Barry Pangrle Power is one of those product characteristics that touches on every phase of the design and verification process all the way from the system architecture down to the fabrication process used for the actual IC implementation. In this month’s blog we take a look at process technology and in this case, it appears to be the case that the technology rich are getting richer. On... » read more

Power Budgeting 101
By Aveek Sarkar - 14 Apr, 2011 - Comments: 0

By Aveek Sarkar With all the processing power that is being designed into smart and superphones now, I wonder what would happen if all four multi-GHz processors were to execute simultaneously? How long would that small battery last—and would anyone be able to hold it in their bare hands?   [caption id="attachment_6305" align="alignnone" width="342"] Phone surface temperature as a ... » read more

RTL Power Estimation
By Luke Lang - 14 Apr, 2011 - Comments: 0

By Luke Lang A few months ago, I wrote about power estimation—finding the worst-case toggle rate to determine the worst-case power. This has been used very successfully by many designers to get an accurate estimation and analysis of power dissipation. These designers also are using the worst-case toggle rate to optimize power grid and meet dynamic IR drop requirements. With these power estim... » read more

Emulation Power
By Barry Pangrle - 14 Apr, 2011 - Comments: 0

By Barry Pangrle Power budgets and the characteristics of the underlying process technologies have limited the clock speeds of the processors often found in large compute farms for simulation over the past six years, but the designs under test have followed Moore’s Law and have kept growing larger at an exponential rate. Processor designers have added more cores per chip to increase the p... » read more

Fire In The Hole?
By Bhanu Kapoor - 14 Apr, 2011 - Comments: 0

By Bhanu Kapoor At the 2001 ISSCC, Pat Gelsinger, then Senior VP at Intel, had observed the following in connection with the growing issue of chip power density: “Ten years from now microprocessors will run at 10GHz to 30GHz and be capable of processing 1 trillion operations per second—about the same number of calculations that the world's fastest supercomputer can perform now. Unfortunate... » read more

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