category: Manufacturing, Packaging and Materials

category: Auto, Security & Edge AI

Manufacturing Bits: Nov. 25
By Mark LaPedus - 25 Nov, 2019 - Comments: 0

RF carbon nanotubes For years, the industry has been working on logic and memory devices based on carbon nanotubes, although these technologies remain in R&D. Now, there is a new device type using carbon nanotubes--RF. Startup Carbonics has developed an RF-based carbon nanotube technology that operates at frequencies over 100GHz. The technology exceeds the cutoff frequency of today�... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 22 Nov, 2019 - Comments: 0

Chipmakers For some time, Intel has experienced supply constraints and shortages for its 14nm chip products. Apparently, the company is still having issues with both 14nm and 10nm. “Despite our best efforts, we have not yet resolved this challenge,” according to a statement from Michelle Johnston Holthaus, executive vice president and general manager of the Sales, Marketing and Communicati... » read more

Is There A Crossover Point For Mainstream Anymore?
By Ed Sperling - 21 Nov, 2019 - Comments: 0

Until 28nm, it was generally assumed that process nodes would go mainstream one or two generations after they were introduced. So by the time the leading edge chips for smartphones and servers were being developed at 16/14nm and 10/7nm, it was assumed that developing a chip at 28nm would be less expensive, less complex, and that the process rule deck would shrink. That worked for decades. Th... » read more

RF GaN Gains Steam
By Mark LaPedus - 21 Nov, 2019 - Comments: 0

Wide-bandgap semiconductors are hot topics these days. One wide-bandgap semi type--silicon carbide (SiC)--is the talk of the town and is gaining steam in electric vehicles and other systems. But let’s not forget about gallium nitride (GaN). GaN, a binary III-V material, has 10 times the breakdown field strength with double the electron mobility than silicon. GaN is used for LEDs, power ... » read more

Weighing Wafers Simplifies Metrology
By Jiangtao Hu - 21 Nov, 2019 - Comments: 2

Building semiconductors is an incredibly exacting process, with critical dimensions posing significant equipment challenges – and with the possibility that small process excursions can cause the yield to decrease. For this reason, it has always been important to measure and monitor the most critical process steps to ensure that no further processing is done on a faulty lot and so that equipme... » read more

A Study Of Next-Generation CFET Process Integration Options
By Benjamin Vincent - 21 Nov, 2019 - Comments: 0

Decision making is a critical step in semiconductor technology development. R&D semiconductor engineers must consider different design and process options early in the development of a next-generation technology. Established techniques such as Failure Mode and Effect Analysis (FMEA) can be used to select among the most promising design and process choices. Once specific design and process m... » read more

DRAM Scaling Challenges Grow
By Mark LaPedus - 21 Nov, 2019 - Comments: 5

DRAM makers are pushing into the next phase of scaling, but they are facing several challenges as the memory technology approaches its physical limit. DRAM is used for main memory in systems, and today’s most advanced devices are based on roughly 18nm to 15nm processes. The physical limit for DRAM is somewhere around 10nm. There are efforts in R&D to extend the technology, and ultimate... » read more

A Benchmark Study Of Complementary-Field Effect Transistor (CFET) Process Integration Options
By Coventor - 21 Nov, 2019 - Comments: 0

Sub-5 nm logic nodes will require an extremely high level of innovation to overcome the inherent real-estate limitations at this increased device density. One approach to increasing device density is to look at the vertical device dimension (z-direction), and stack devices on top of each other instead of conventionally side-by-side. [1] The fabrication of a Complementary-Field Effect Transistor... » read more

New Trends In Wafer Bonding
By Katherine Derbyshire - 21 Nov, 2019 - Comments: 0

Unable to scale horizontally, due to a combination of lithography delays and power constraints, manufacturers are stacking devices vertically. This has become essential as the proliferation of mobile devices drives demand for smaller circuit footprints, but the transition isn't always straightforward. Three-dimensional integration schemes take many forms, depending on the required interconne... » read more

New Developments Of Copper Plating Technology For Embedded Power Chip Packages Challenges
By ASE - 21 Nov, 2019 - Comments: 0

Copper plating has been extensively employed in the fabrication of embedded packaging to reach high-density, high-speed, high performance electronic products. With through holes (TH) as well as blind via aspect ratios increase, development of a reliable plating technology is very important. When the depth of through hole was over 200µm, it is difficult to fill without void by using direct curr... » read more

← Older posts Newer posts →

  • Sponsors

  • Standards/Organizations

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy