category: System-Level Design

category: Auto, Security & Edge AI

Making Way For Register Specification Software
By Anupam Bakshi - 28 Apr, 2016 - Comments: 0

No one gives much thought to the heating, ventilation and air conditioning registers in the house –– typically, two in each room, one for supply, the other for return. That is, until the lever in each needs to be manually adjusted to modulate the temperature to be hotter or colder, or the seasons change and the filters with them. Alas, registers in hardware design seem to have gotten the... » read more

The Early Bird Catches The Bug Using Formal
By Dave Kelf - 28 Apr, 2016 - Comments: 0

It has been suggested that formal might replace simulation, at least in some parts of the design flow. Not likely! The question is, how can formal be layered on top of simulation flows to improve coverage and schedule? The way formal is being used at the larger semiconductor companies is evolving. In many of these companies a small team of hardcore formal experts are employed across differen... » read more

System-Level Verification Tackles New Role
By Brian Bailey - 28 Apr, 2016 - Comments: 0

Wally Rhines, chairman and CEO of Mentor Graphics, gave the keynote at DVCon this year. He said that if you pull together a bunch of pre-verified IP blocks, it does not change the verification problem at the system level. That sounds like a problem. There are assumptions made that the IP blocks work to a reasonable degree, and that when performing system-level verification the focus is not a... » read more

Stories From The Village Called Hardware-Assisted Development
By Frank Schirrmeister - 28 Apr, 2016 - Comments: 0

They say it takes a village to raise children and, as a dad of an 11-year-old girl, I can relate. Similarly, for system development and hardware-assisted verification, the overall ecosystem of users, use models, and partners is equally important. The recent CDNLive Silicon Valley event is a great example. The SoC and Hardware/Software track that my team and I were hosting featured NVIDIA, Netro... » read more

UVM Register Layer: The Structure
By Henry Chan - 28 Apr, 2016 - Comments: 0

I don’t know about you, but I am looking forward to the day where we won’t even have to go to the doctor’s office for an exam. Instead, we will all have scanners in our homes that will transmit full digital models to our doctors who can then poke, prod, and examine us remotely. This is essentially what the UVM register layer allows and does. The UVM register layer acts similarly by mod... » read more

Earthquake Proof Your Software Development
By Malte Doerper - 28 Apr, 2016 - Comments: 0

In this blog we tend to focus on the benefits and opportunities that arise when using virtual prototyping. However, in real life we well know that any situation bears not only opportunities but also risks. I was reminded of this by the recent earthquake disaster in Kumamoto Japan. Having lived in the most earthquake prone areas in the world for the past 10 years, I know firsthand how easy it is... » read more

Deep Space Design Considerations
By Nicolas Williams - 28 Apr, 2016 - Comments: 0

The linchpin technology in a deep space telescope is the ability to efficiently convert analog image sensor data into digital data in order to beam home high-resolution images of astronomical objects. The analog-to-digital converters (ADC) must perform flawlessly once deployed, because it is not feasible to drive out 1 million miles into space to fix any problems. The next-generation success... » read more

Better Heterogeneous CPU Designs
By Ronan Synnott - 28 Apr, 2016 - Comments: 0

The trend toward heterogeneous CPU designs is growing. Case in point: The NXP i.MX7 family of devices have such a design. In this blog, I will discuss the (simple) steps necessary to get the most out of i.MX7 using the ARM Development Studio, more commonly known as DS-5, but the information applies to most similar systems. Compiling code depends greatly on the use case. Within DS-5, there... » read more

On The Verge
By Mike Gianfagna - 27 Apr, 2016 - Comments: 0

Anyone who has been following the IoT/IoE or whatever-you-want-to-call-it movement knows we’re on the eve of far-reaching, life-altering change. There will be billions of connected devices, all streaming information to gigascale cloud datacenters using big data analytics and deep machine learning. Somewhere along the way, we’ll discover important, useful information from all this tha... » read more

High-Bandwidth Memory
By eSilicon - 27 Apr, 2016 - Comments: 0

High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect stacked DRAM die. In its first implementation, it is being integrated with a system-on-chip (SoC) logic die using 2.5D silicon interposer technology. This white paper explains HBM’s value proposition, and how these five companies make... » read more

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