category: System-Level Design

category: Auto, Security & Edge AI

USB Connectors Get Smarter
By Ann Mutschler - 30 Jul, 2015 - Comments: 0

By now, there’s quite a buzz about the new USB Type-C spec given that it provides for a reversible plug connector for USB devices and cabling, aiming to end the endless cable flipping to make sure the orientation is correction. To avoid confusion, while developed at about the same time as the USB 3.1 specification, it is distinct from that one. When it comes to software support for Type-C,... » read more

Making Hardware Design More Agile
By Ed Sperling - 30 Jul, 2015 - Comments: 0

Semiconductor engineering sat down to whether changes are needed in hardware design methodology, with Philip Gutierrez, ASIC/FPGA design manager in [getentity id="22306" comment="IBM"]'s FlashSystems Storage Group; Dennis Brophy, director of strategic business development at [getentity id="22017" e_name="Mentor Graphics"]; Frank Schirrmeister, group director for product marketing of the System ... » read more

IP Verification Challenges
By Brian Bailey - 30 Jul, 2015 - Comments: 0

At the Design Automation Conference this year, the Designer and IP tracks were the stars of the show in many ways. These sessions catered to industry rather than academia and provided engineers with information they could directly use in their jobs. Many of the sessions were filled to capacity and Anne Cirkel, general chair for the 52nd DAC, was enthusiastic about the growing success of these t... » read more

Prototyping To Help You Win The Battle
By Tom De Schutter - 30 Jul, 2015 - Comments: 0

Lately, my children and I are closely following a new show on ABC called “Battlebots”. The concept is as simple as it is cool—have a massive bulletproof arena where two remote-controlled robots battle it out until one is knocked out or the time is up (and a jury decides the winner). The battles are all about making physical contact with the other robot to either directly deal them damage ... » read more

Consolidation Creates Confusion
By Mike Gianfagna - 30 Jul, 2015 - Comments: 0

Consolidation in any industry is a sign of maturation. Diverse business models converge to the ones that really work. Supply and demand find equilibrium with a right-sized supply base. And generally, the fittest survive. The semiconductor industry is somewhere around a half-century old, so consolidation in this industry is to be expected, and we have certainly seen some consolidation of late. ... » read more

7 Ways to Assess Semiconductor IP Quality
By Kurt Shuler - 30 Jul, 2015 - Comments: 0

Design teams today are struggling with the quality of semiconductor intellectual property. These teams want first-pass success for SoC creation, but that is becoming increasingly difficult to achieve—especially with highly configurable IP. Yet the more configurable the IP is, the more desirable it is as a differentiator. And if not developed correctly, it may be even more risky than non-confi... » read more

Why DSA Is Cost Effective For 7nm And Below
By Yuansheng Ma - 30 Jul, 2015 - Comments: 0

The upcoming 7nm process node presents tough challenges both for printability and cost. At 7nm and below, multi-patterning is required, which makes the manufacturing process more expensive by requiring more masks. To control costs, any alternative technology that provides equivalent yields with fewer patterning steps should be explored. One promising option is to use directed self-assembly (... » read more

Tech Talk: USB Type-C
By Ed Sperling - 30 Jul, 2015 - Comments: 1

NXP's Ravi Shah explains how to design in the new USB standard, what to watch out for and why it's going to be so important for mobile and connected devices. [youtube vid=iPCwpaPy1pw] » read more

Analog FastSpice Platform Full-Spectrum Sampled Periodic Noise Analysis
By Mentor, a Siemens Business - 29 Jul, 2015 - Comments: 0

Many high-performance analog/mixed-signal ICs include track-and-hold circuits to sample analog signals at one or more discrete timepoints per period. Although track-and-hold circuits are periodic, traditional periodic noise (pnoise) analysis does not apply because it measures the device noise impact integrated over an entire period rather than at instantaneous time points within the target peri... » read more

Accelerate SoC Simulation Time Of Newer Generation FPGAs
By Aldec - 29 Jul, 2015 - Comments: 0

Comprehensive verification that can be provided by HDL simulators is good, but not ideal. What is necessary is a faster, safer, and more thorough verification environment that combines the robustness of an HDL simulator with the speed of FPGA prototyping boards. The goal is to put together the power of these two verification methodologies into one platform. To read more, click here. » read more

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