category: System-Level Design

category: Auto, Security & Edge AI

Quantum Shifts
By Ed Sperling - 25 Oct, 2012 - Comments: 0

By Ed Sperling Intel, STMicroelectronics and some of the leading memory providers already are working on 10nm process technology, and advanced researchers in universities and industry-leading companies are looking at 7nm, 5nm and even beyond. Those who have glimpsed this technological future have similar observations. There is no single technology problem that has to be solved at these node... » read more

Making Important Choices
By Nithya Ruff - 25 Oct, 2012 - Comments: 0

By Nithya Ruff Last year, my daughter was a senior in high school, very busy finalizing her college selections and completing college applications. For anyone who has gone through this recently, it is not a trivial task to select a place where you will spend the next four years, a place that will shape your future and where you will be spending a good amount of your parent’s money. This expe... » read more

Putting The “Heterogeneous” In The HSA Foundation
By Kurt Shuler - 25 Oct, 2012 - Comments: 0

By Kurt Shuler In last month’s article I explained why symmetric multiprocessing (SMP) architectures have been popular in PC and server markets, and why heterogeneous or asymmetric multiprocessing (AMP) has been the norm in mobility and consumer electronics markets. I also explained the trends that are leading PC and server markets to adopt heterogeneous architectures and introduced the HSA ... » read more

Tech Talk: Faster But Less Accurate
By Ed Sperling - 25 Oct, 2012 - Comments: 0

Semiconductor Engineering talks with professor Jan Rabaey of the University of California at Berkeley about new design approaches that could significantly boost performance and simplify design and verification—for some applications. [youtube vid=hAk1xA56h_A] » read more

Coherently Incoherent: Dealing With Complexity
By Frank Ferro - 25 Oct, 2012 - Comments: 0

By Frank Ferro I was a bit frustrated this weekend after installing a digital light timer—yes a light timer. As an engineer this should be no big deal, and for the most part, I installed it without shocking myself or other major problems. This timer had all the bells and whistles. It knows about time zones, adjusts daily for dawn and dusk. It even adjusts for daylight savings time. The probl... » read more

Moore’s Law Revisited
By Ed Sperling - 25 Oct, 2012 - Comments: 0

It’s no surprise that Moore’s Law can continue for many more generations. Intel’s road map already extends down to 5nm, most likely with carbon nanotube FETs, tunnel FETs, graphene TSVs and maybe even fully depleted SOI to replace bulk CMOS. The rest of the industry has been hanging back a node or two, gliding on the coattails of what Intel and companies like IBM, Samsung and STMicroel... » read more

The Real Value Of Test
By Jon McDonald - 25 Oct, 2012 - Comments: 0

By Jon McDonald Sometimes one test is worth a thousand code reviews. Perhaps not a thousand, but it is a very significant number. Not that this is a new idea, but I’ve had a couple of experiences recently that reminded me how valuable a transaction-level simulation model is as an executable specification. In one case we were reviewing aspects of a potential design change, trying to decide... » read more

Challenges For Patterning Process Models Applied To Large Scale
By Various Writers - 25 Oct, 2012 - Comments: 0

Full-chip patterning simulation has been a key enabler for multiple technology generations, from 130 nm to the emerging 14 nm node. This span has featured two wavelength changes, a progression of optical NA increases (and a subsequent decrease), and a variety of patterning processes and chemistries. Full-chip patterning simulations utilize quasi-rigorous optical models and semi-empirical resist... » read more

Optimizing And Maintaining A High-Performing Design Environment
By Various Writers - 25 Oct, 2012 - Comments: 0

To maximize your investment in electronic design automation (EDA) tools, your infrastructure and processes must be optimized for growing and frequently changing design needs. Cadence Client Technology Solutions is dedicated to enhancing EDA tool performance, ensuring stability, and removing critical bottlenecks. Through close collaboration with hundreds of customers worldwide, we have unique in... » read more

Design Solutions For 20nm And Beyond
By Various Writers - 25 Oct, 2012 - Comments: 0

The consumer’s insatiable demand for greater performance, a shrinking form factor and extended battery life, all while continuing the trend for lower end user cost is the driving force behind the semiconductor industry’s rapid evolution to ever smaller process geometries. As with many of the previous process geometry shrinks, there will be the usual concerns about the increase in design ... » read more

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