category: System-Level Design

category: Auto, Security & Edge AI

AI’s Role In Chip Design Widens, Drawing In New Startups
By Karen Heyman - 29 Aug, 2024 - Comments: 0

Using AI in EDA is reinvigorating the whole tools industry, prompting established players to upgrade their tool offerings with AI/ML features, while drawing in startups trying to carve out differentiated approaches to fill unaddressed gaps with new tools and methodologies. Today’s new generation of entrepreneurs is comprised of both young post-grads with innovative ideas and industry veter... » read more

Edge Devices Require New Security Approaches
By Adam Kovac - 29 Aug, 2024 - Comments: 0

The diversity of connected devices and chips at the edge — the vaguely defined middle ground between the end point and the cloud — is significantly widening the potential attack surface and creating more opportunities for cyberattacks. The edge build-out has been underway for at least the past half-decade, largely driven by an explosion in data and increasing demands to process that data... » read more

GDDR7: The Ideal Memory Solution In AI Inference
By Frank Ferro - 29 Aug, 2024 - Comments: 1

The generative AI market is experiencing rapid growth, driven by the increasing parameter size of Large Language Models (LLMs). This growth is pushing the boundaries of performance requirements for training hardware within data centers. For an in-depth look at this, consider the insights provided in "HBM3E: All About Bandwidth". Once trained, these models are deployed across a diverse range of... » read more

Defining The Chiplet Socket
By Brian Bailey - 29 Aug, 2024 - Comments: 0

Experts At The Table: The semiconductor industry has been buzzing with the possibilities surrounding chiplets, but so far this packaging technology has been confined to large semiconductor companies that are vertically integrated. The industry has been attempting to open this up to a broader group of people. To work out what this means for chiplets, and what standardization will be required, Se... » read more

Accelerating The Pace And Precision Of AI Chip Innovation
By Stelios Diamantidis - 29 Aug, 2024 - Comments: 0

The Hot Chips 2024 conference, which took place this week in Silicon Valley, was a showcase for AI chip innovation. The three-day program illustrated the race among both established chipmakers and new entrants to explore advanced architectures and embrace novel design solutions to deliver the next breakthrough AI processor. In this article, I share a few “hot takes” from the conference that... » read more

Ready For Curvilinear: New Innovations For Resistance Extraction
By Siemens EDA - 29 Aug, 2024 - Comments: 0

The rapid evolution of semiconductor industry, fueled by the propagation of IOT applications, image sensors, photonics and MEMS applications and other emerging technologies dramatically increased the complexity of IC design. Designers often use unconventional structures to achieve the desired functionality and optimal performance. For example, image sensors use wide polygons in the layout and a... » read more

Chiplets and the Early Adopter’s Dilemma
By Eliyan - 28 Aug, 2024 - Comments: 0

Early adopters of a new technology often face a serious dilemma. On one hand, moving early means exploiting the most aggressive new technology available. But on the other hand, making early technology decisions can lock a product line into a path that will later become uncompetitive—either a single-vendor solution that can’t guarantee continuity of supply, or a roadmap that can’t shift an... » read more

Developing Workflows To Streamline System-Level Design
By Ann Mutschler - 28 Aug, 2024 - Comments: 0

Experts At The Table: One of the big challenges facing EDA companies is explaining to customers what's possible, how to streamline their designs, and what can be accomplished at what level of risk. Semiconductor Engineering sat down to talk about how relationships are fundamentally changing between EDA companies and their customers Michal Siwinski, chief marketing officer at Arteris; Chris Muet... » read more

Enabling Efficient Multi-Die Design Implementation and IP Integration
By Synopsys - 28 Aug, 2024 - Comments: 0

Many industry trends are driving chip developers to consider multi-die designs using advanced 2.5D and 3D technologies. Such designs enable incorporating heterogeneous and homogeneous dies in a single package, increasing density while reducing signal propagation times. However, multi-die designs introduce new challenges that must be addressed by all relevant electronic design automation (EDA) a... » read more

Blog Review: Aug. 28
By Jesse Allen - 28 Aug, 2024 - Comments: 0

Synopsys' Jon Ames checks out how the Ultra Ethernet Consortium aims to revolutionize networking by optimizing Ethernet for the rapidly evolving AI and HPC workloads by addressing critical issues like tail latency that are encountered by machine learning algorithms in large compute clusters. Cadence's Kos Gitchev introduces the DDR5 Multiplexed Rank DIMM (MRDIMM), a memory module technology ... » read more

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