TimeCache: Using Time to Eliminate Cache Side Channels when Sharing Software


"Abstract—Timing side channels have been used to extract cryptographic keys and sensitive documents even from trusted enclaves. Specifically, cache side channels created by reuse of shared code or data in the memory hierarchy have been exploited by several known attacks, e.g., evict+reload for recovering an RSA key and Spectre variants for leaking speculatively loaded data. In this paper, we ... » read more

Communication Algorithm-Architecture Co-Design for Distributed Deep Learning


"Abstract—Large-scale distributed deep learning training has enabled developments of more complex deep neural network models to learn from larger datasets for sophisticated tasks. In particular, distributed stochastic gradient descent intensively invokes all-reduce operations for gradient update, which dominates communication time during iterative training epochs. In this work, we identify th... » read more

Don’t Forget the I/O When Allocating Your Last-Level Cache


Source/Authors: Yifan Yuan (UIUC); Mohammad Alian (Kansas); Yipeng Wang, Ren Wang (Intel Labs); Ilia Kurakin (Intel); Charlie Tai (Intel Labs); Nam Sung Kim (UIUC) Find technical paper here. 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA.) "Abstract—In modern server CPUs, last-level cache (LLC) is a critical hardware resource that exerts significant... » read more

Ten Lessons From Three Generations Shaped Google’s TPUv4i


Source: Norman P. Jouppi, Doe Hyun Yoon, Matthew Ashcraft, Mark Gottscho, Thomas B. Jablin, George Kurian, James Laudon, Sheng Li, Peter Ma, Xiaoyu Ma, Nishant Patil, Sushma Prasad, Clifford Young, Zongwei Zhou (Google); David Patterson (Google / Berkeley) Find technical paper here. 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA) Abstract–"Google de... » read more

Improvement Of EUV Si Hardmask Performance Through Wet Chemistry Functionalization


In EUV lithography, spin-on silicon hardmasks have been widely used not only as etch transfer layers, but also as assist layers to enhance the lithographic performance of resist. In this study, we demonstrate a novel approach to functionalize spin-on silicon hardmasks by hybridizing them with functional groups through a sol-gel approach. By varying the concentration and type of the functional g... » read more

HyperRec: Efficient Recommender Systems with Hyperdimensional Computing


A group of researchers are taking a different approach to AI. The University of California at San Diego, the University of California at Irvine, San Diego State University and DGIST recently presented a paper on a new hardware algorithm based on hyperdimensional (HD) computing, which is a brain-inspired computing model. The new algorithm, called HyperRec, uses data that is modeled with bina... » read more

Accellera’s Functional Safety Group White Paper


"The objective of the Functional Safety Working Group is to standardize information for capturing and propagating the safety intent from the system down to the SoC / IP design and implementation including failure mode propagation, verification, validation, reliability and Safety Mechanisms. The safety intent standardization will support data exchange and traceability across different safety ana... » read more

Ferroelectric, hafnium oxide based transistors for digital beyond von-Neumann computing


Source: AIP Applied Physics Letters, published 2/4/2021.  Evelyn T. Breyer1,  Halid Mulaosmanovic1,  Thomas Mikolajick1,2, and  Stefan Slesazeck1 1Nanoelectronic Materials Laboratory (NaMLab) gGmbH, 01187 Dresden, Germany 2Chair of Nanoelectronics, TU Dresden, 01187 Dresden, Germany   Technical paper link is here » read more

Final Report: National Security Commission on AI


  In August 2018, Section 1051 of the John S. McCain National Defense Authorization Act for Fiscal Year 2019 established the National Security Commission on Artificial Intelligence as an independent Commission “to consider the methods and means necessary to advance the development of artificial intelligence, machine learning, and associated technologies to comprehensively address the... » read more

A Novel PUF Using Stochastic Short-Term Memory Time of Oxide-Based RRAM for Embedded Applications


Abstract: "RRAM suffers from poor retention with short-term memory time when using low compliance current for programing. However, the short-term memory time exhibits ideal randomness, which can be exploited as an entropy source for physically unclonable function (PUF). In this work, we demonstrated a novel PUF utilizing the stochastic short-term memory time of oxide-based RRAM. The proposed P... » read more

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