2D UltraLow Temperatures, High Performance Quantum


A new technical paper titled "Electrically tunable giant Nernst effect in two-dimensional van der Waals heterostructures" was published by researchers at EPFL and National Institute for Materials Science (Japan). Abstract "The Nernst effect, a transverse thermoelectric phenomenon, has attracted significant attention for its potential in energy conversion, thermoelectrics and spintronics. ... » read more

Resilient And Secure Programmable SoC Accelerator Offload (KAUST)


A technical paper titled “Resilient and Secure Programmable System-on-Chip Accelerator Offload” was published by researchers at King Abdullah University of Science and Technology (KAUST). Abstract: "Computational offload to hardware accelerators is gaining traction due to increasing computational demands and efficiency challenges. Programmable hardware, like FPGAs, offers a promising plat... » read more

Lower Energy, High Performance LLM on FPGA Without Matrix Multiplication


A new technical paper titled "Scalable MatMul-free Language Modeling" was published by UC Santa Cruz, Soochow University, UC Davis, and LuxiTech. Abstract "Matrix multiplication (MatMul) typically dominates the overall computational cost of large language models (LLMs). This cost only grows as LLMs scale to larger embedding dimensions and context lengths. In this work, we show that MatMul... » read more

Overview of Test Strategies for 3DICs


A new technical paper titled "Design-for-Test Solutions for 3D Integrated Circuits" was published by researchers at Duke University, Arizona State University, and NVIDIA. Abstract: "As Moore's Law approaches its limits, 3D integrated circuits (ICs) have emerged as promising alternatives to conventional scaling methodologies. However, the benefits of 3D integration in terms of lower power co... » read more

Nanosized Blocks Self-Assemble In Water To Create Tiny Floating Checkerboards (UC San Diego, Duke)


A technical paper titled “Self-assembly of nanocrystal checkerboard patterns via non-specific interactions” was published by researchers at the University of California San Diego and Duke University. Abstract: "Checkerboard lattices—where the resulting structure is open, porous, and highly symmetric—are difficult to create by self-assembly. Synthetic systems that adopt such structures... » read more

A Memory Device With MoS2 Channel For High-Density 3D NAND Flash-Based In-Memory Computing


A technical paper titled “Low-Power Charge Trap Flash Memory with MoS2 Channel for High-Density In-Memory Computing" was published by researchers at Kyungpook National University, Sungkyunkwan University, Dankook University, and Kwangwoon University. Abstract: "With the rise of on-device artificial intelligence (AI) technology, the demand for in-memory computing has surged for data-intensiv... » read more

Thermoelectric Active Cooling Hot Spots in Chips


A technical paper titled “Thermoelectric active cooling for transient hot spots in microprocessors” was published by researchers at the University of Pittsburgh and Carnegie Mellon University. Abstract: "Modern microprocessor performance is limited by local hot spots induced at high frequency by busy integrated circuit elements such as the clock generator. Locally embedded thermoelectric ... » read more

New Way To Transmit Light Signals Through A Chip (NIST)


A technical paper titled “Bound-state-in-continuum guided modes in a multilayer electro-optically active photonic integrated circuit platform” was published by researchers at the National Institute of Standards and Technology (NIST), University of Maryland, and Theiss Research. Abstract: "In many physical systems, the interaction with an open environment leads to energy dissipation and re... » read more

An LLM Approach For Large-Scale SoC Security Verification And Policy Generation (U. of Florida)


A technical paper titled “SoCureLLM: An LLM-driven Approach for Large-Scale System-on-Chip Security Verification and Policy Generation” was published by researchers at the University of Florida. Abstract: "Contemporary methods for hardware security verification struggle with adaptability, scalability, and availability due to the increasing complexity of the modern system-on-chips (SoCs). ... » read more

NeuroHammer Attacks on ReRAM-Based Memories


A new technical paper titled "NVM-Flip: Non-Volatile-Memory BitFlips on the System Level" was published by researchers at Ruhr-University Bochum, University of Duisburg-Essen, and Robert Bosch. Abstract "Emerging non-volatile memories (NVMs) are promising candidates to substitute conventional memories due to their low access latency, high integration density, and non-volatility. These super... » read more

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