Digital Twins For Packaging: Bridging Design, Fab, Test, And Reliability


Digital twins dominated discussions at SEMICON West this year, appearing in keynote presentations, panel sessions, and workshops. The conversation reflected a noticeable shift in how the industry views the technology. What once was mainly associated with design exploration now spans the manufacturing lifecycle. In packaging and assembly, digital twins are emerging as a way to connect design ... » read more

Powering Efficiency: AI Transforms IC Manufacturing As ICs Fuel AI


The push to grow today’s $500 billion-plus semiconductor industry to $1 trillion in annual revenue is challenging every aspect of the broader supply chain to embrace AI. Artificial intelligence is transforming the way fabs are architected and run, how devices are manufactured, and how server farms are constructed going forward. At the same time, all of this is being enabled by advancements... » read more

Why In-Memory Computation Is So Important For Edge AI


In popular media, “AI” usually means large language models running in expensive, power-hungry data centers. For many applications, though, smaller models running on local hardware are a much better fit. Autonomous vehicles need to respond in real-time, without data transmission delays. Medical and industrial applications often depend on sensitive data that cannot be shared with third par... » read more

Multiple Challenges Emerge With Physical AI System Design


Physical AI holds the promise of making everything from robots to a slew of mobile edge devices much more interactive and useful, but it will significantly alter how systems are designed, verified, and monitored. Physical AI systems need to work both independently and together. They need the ability to make decisions quickly and locally, typically using much less power than other types of AI... » read more

Data Centers Boost Voltage For Higher Efficiency


The power architecture used in HPC and AI data centers today is about to undergo a significant change in an effort to boost power efficiency. While voltages at the chip level will remain the same, the voltages leading to those chips will be kept higher for longer distances. This change has broad implications for DC-DC converters. The existing architecture brings AC to each rack, converts it ... » read more

Startup Tips To Get From Seed Funding To Series A, B, C


Startups are often created by experienced engineers who figure out how to solve a technical problem they are dealing with at work, or by PhD candidates in research labs before they have even started their first full-time job. Either way, getting seed money to the tune of a few million dollars is relatively easy compared to securing further rounds of funding and achieving the company’s exit go... » read more

Current Problems Grow For Power Delivery


IR drop is becoming more problematic for a growing proportion of designs, an indication that the power delivery network (PDN) is not providing enough current to parts of the design when required. Unfortunately, there is no easy fix to this problem. In the past, when voltages were much higher, a small voltage droop didn't really matter. At the same time, wires were much thicker and presented ... » read more

New Frontiers In Fault Detection And Classification


IC manufacturers are increasingly relying on intelligent data processing to prevent downtime, improve yields, and reduce scrap. They are integrating that with fault detection and classification (FDC) to trace faults to their cause. Today’s FDC systems feature better sensors, variability control, and both predictive and prescriptive modeling. In the future, FDC will enable real-time decisio... » read more

Metrology’s Growing Role In Reducing False Defects


When a good die fails test and gets scrapped, often no one notices, because false failures look identical to real ones. Yet across the industry, these phantom defects are quietly eroding yield, inflating test costs, and masking the true health of manufacturing processes. At advanced nodes and in heterogeneous packaging, where margins are already razor-thin, even minor variations in contact r... » read more

Hybrid Approach Emerges For Edge/Cloud Inspection Of Chips


An explosion in data from inspection images and metrology measurements is creating a confusing set of demands for chipmakers and their equipment vendors. On one hand they need the massive storage and compute resources of the cloud to utilize AI/ML-based models, but they also need the faster response time of the edge to make adjustments at the tool level. Balancing these requirements is a mas... » read more

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