New Rules Put The Squeeze On Semiconductor Gray Market


The shift toward chiplets and multi-die assemblies is forcing big changes in the global supply chain, including much tighter cooperation between companies and governments to ensure the authenticity and quality of semiconductor parts. The chip industry has been looking to digital certificates as the best means of reducing counterfeiting and ensuring consistent quality for some time. The probl... » read more

HBM Leads The Way To Defect-Free Bumps


High-bandwidth memory stands at the forefront of multiple technology developments as a critical enabler of AI, but it is one of the most difficult modules to manufacture. Leading HBM device makers and foundries must simultaneously handle multi-layer chip stacking, die warpage, and shorter product lifecycles that are shrinking from two years down to just one. But perhaps the most formidable c... » read more

LLMs Add Safety Risks To Physical AI


Humanoid robots with artificial general intelligence are some years from entering our daily life, but application-specific robotics are already here. From Amazon’s fleet of fulfillment center robots to robotic surgical systems in operating rooms, search and rescue robo-dogs, autonomous drones, and last-mile delivery robots, all the way down to the humble Roomba vacuum cleaner, physical AI sys... » read more

Moving AI Workloads To The Edge


Experts At The Table: Semiconductor Engineering gathered a group of experts to discuss how some AI workloads are better suited for on-device processing to achieve consistent performance, avoid network connectivity issues, reduce cloud computing costs, and ensure privacy. The panel included Frank Ferro, group director in the Silicon Solutions Group at Cadence; Eduardo Montanez, vice president an... » read more

How Fast Can Germany Shift To Software-Defined Vehicles?


It's being called "China speed," defined by the accelerated rate at which software-defined vehicles can be designed, manufactured, and updated with new features. And nowhere is this hitting harder and forcing more profound changes than in Germany, Europe's leading automotive market. Rather than relying solely on customized electronic control units, SDVs use a combination of specialized and g... » read more

Formal Verification’s Value Grows


Experts at the table: Semiconductor Engineering sat down to discuss why formal verification is becoming more important, with Ashish Darbari, CEO for Axiomise; Jin Zhang, product management group director for the Verification Group at Cadence; Sean Safarpour, executive director for R&D at Synopsys; and Jeremy Levitt, principal engineer for Digital Verification Technology at Siemens EDA. Wha... » read more

Small Vs. Large Language Models


The proliferation of edge AI will require fundamental changes in language models and chip architectures to make inferencing and learning outside of AI data centers a viable option. The initial goal for small language models (SLMs) — roughly 10 billion parameters or less, compared to more than a trillion parameters in the biggest LLMs — was to leverage them exclusively for inferencing. In... » read more

Thermal, Mechanical, And Material Stresses Grow With Die Stacking


Managing thermal and mechanical stress in multi-die assemblies will require a detailed knowledge of how and where a device will be used, how it will be packaged, and where stresses could cause problems at any point during its expected lifetime. This includes everything from workload-dependent thermal gradients to mechanical and electrical stress, which may become more pronounced over time wi... » read more

Even With AI Inroads, Human Chip Designers Still Essential


The proliferation of AI tools seems perfectly matched to fill a talent shortage, but a closer look shows the skills do not entirely overlap. Certain parts of the EDA pipeline require human engineers, and it seems likely to stay that way for the foreseeable future. The dark art of analog design, the final word on safety-critical functional safety, high-level architectural decisions, product i... » read more

Advances In Formal Verification Technology


Experts at the table: Semiconductor Engineering sat down to discuss advances in formal verification tools and methodologies with Ashish Darbari, CEO for Axiomise; Jin Zhang, product management group director for the Verification Group at Cadence; Sean Safarpour, executive director for R&D at Synopsys; and Jeremy Levitt, principal engineer for Digital Verification Technology at Siemens EDA.... » read more

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