Latest IC Outlook: More Uncertainty


So far in 2020, it’s been a difficult period in the semiconductor industry amid the Covid-19 pandemic outbreak and other issues. And heading into the second half of 2020, the industry faces more challenges, if not uncertainty, in the market. Many segments in the semiconductor industry face some headwinds, but there might be some positive news in the equipment business. To be sure,... » read more

EUV’s Uncertain Future At 3nm And Below


Several foundries have moved extreme ultraviolet (EUV) lithography into production at both 7nm and 5nm, but now the industry is preparing for the next phase of the technology at 3nm and beyond. In R&D, the industry is developing new EUV scanners, masks and resists for the next nodes. 3nm is slated for 2022, followed by 2nm a year or two later. Nonetheless, it will require massive funding... » read more

Challenges In Stacking, Shrinking And Inspecting Next-Gen Chips


Rick Gottscho, CTO of Lam Research, sat down with Semiconductor Engineering to discuss memory and equipment scaling, new market demands, and changes in manufacturing being driven by cost, new technologies, and the application of machine learning. What follows are excerpts of that conversation. SE: We have a lot of different memory technologies coming to market. What's the impact of that? ... » read more

Compute-In Memory Accelerators Up-End Network Design Tradeoffs


An explosion in the amount of data, coupled with the negative impact on performance and power for moving that data, is rekindling interest around in-memory processing as an alternative to moving data back and forth between the memory and the processor. Compute-in-memory (CIM) arrays based on either conventional memory elements like DRAM and NAND flash, as well as emerging non-volatile memori... » read more

Design For Narrowband IoT


Most low-power chips are designed with the assumption that batteries can be recharged or replaced, but there is a whole set of IoT devices under development that are expected to be always-on, communicate over a cellular infrastructure, and remain functional on a coin-sized lithium-ion battery for a decade or more. Welcome to the world of Narrowband IoT (NB-IoT), a 3GPP standard (also known a... » read more

Choosing Between CCIX And CXL


Semiconductor Engineering sat down to the discuss the pros and cons of the Compute Express Link (CXL) and the Cache Coherent Interconnect for Accelerators (CCIX) with Kurt Shuler, vice president of marketing at Arteris IP; Richard Solomon, technical marketing manager for PCI Express controller IP at Synopsys; and Jitendra Mohan, CEO of Astera Labs. What follows are excerpts of that conversati... » read more

Spiking Neural Networks: Research Projects or Commercial Products?


Spiking neural networks (SNNs) often are touted as a way to get close to the power efficiency of the brain, but there is widespread confusion about what exactly that means. In fact, there is disagreement about how the brain actually works. Some SNN implementations are less brain-like than others. Depending on whom you talk to, SNNs are either a long way away or close to commercialization. Th... » read more

Low-Power Analog


Analog circuitry is usually a small part of a large SoC, but it does not scale in the same way as digital circuitry under Moore's Law. The power consumed by analog is becoming an increasing concern, especially for battery-operated devices. At the same time, little automation is available to help analog designers reduce consumption. "Newer consumer devices, like smartphones and wearables, alo... » read more

Auto Power Becoming Much More Complex


Rising electronics content in automobiles is putting increased focus on automotive power delivery networks (PDNs). Safety implications mean that thorough power design and verification, along with novel power isolation techniques, are needed at the vehicle level, involving both electrical and mechanical considerations. The electronic takeover can be measured by the percentage that electronic ... » read more

‘More Than Moore’ Reality Check


The semiconductor industry is embracing multi-die packages as feature scaling hits the limits of physics, but how to get there with the least amount of pain and at the lowest cost is a work in progress. Gaps remain in tooling and methodologies, interconnect standards are still being developed, and there are so many implementations of packaging that the number of choices is often overwhelming. ... » read more

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