category: Top Stories

category: Auto, Security & Edge AI

BEOL Issues At 10nm And 7nm
By Ed Sperling - 31 Jan, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

Managing Parasitics For Transistor Performance
By Katherine Derbyshire - 30 Jan, 2017 - Comments: 3

The basic equations describing transistor behavior rely on parameters like channel doping, the capacitance of the gate oxide, and the resistance between the source and drain and the channel. And for most of the IC industry's history, these have been sufficient. “Parasitic” or “external” resistances and capacitances from structures outside the transistor have been small enough to discoun... » read more

2017: Tool And Methodology Shifts
By Brian Bailey - 26 Jan, 2017 - Comments: 0

As the markets for semiconductor products evolve, so do the tools that enable automation, optimization and verification. While tools rarely go away, they do bend like plants toward light. Today, it is no longer the mobile phone industry that is defining the direction, but automotive and the Internet of Things (IoT). Both of these markets have very different requirements and each creates their o... » read more

Hybrid Simulation Picks Up Steam
By Ann Mutschler - 26 Jan, 2017 - Comments: 0

As electronic products shift from hardware-centric to software-directed, design teams are relying increasingly on a simulation approach that includes multiple engines—and different ways to use those engines—to encompass as much of the system as possible. How engineers go about using these approaches, and even how they define them, varies greatly from one company to the next. Sometimes it... » read more

Changing Direction In Chip Design
By Ed Sperling - 26 Jan, 2017 - Comments: 1

Andrzej Strojwas, chief technologist at PDF Solutions and professor of electrical and computer engineering at Carnegie Mellon University—and the winner of this year's Phil Kaufman Award for distinguished contributions to EDA—sat down with Semiconductor Engineering to talk about device scaling, why the semiconductor industry will begin to fragment around new architectures and packaging, and ... » read more

New Embedded Memories Ahead
By Mark LaPedus - 25 Jan, 2017 - Comments: 0

The embedded memory market is beginning to heat up, fueled by a new wave of microcontrollers (MCUs) and related chips that will likely require new and more capable nonvolatile memory types. The industry is moving on several different fronts in the embedded memory landscape. On one front, traditional solutions are advancing. On another front, several vendors are positioning the next-generatio... » read more

What Can Go Wrong In Automotive
By Ed Sperling - 25 Jan, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss automotive engineering with Jinesh Jain, supervisor for advanced architectures in Ford’s Research and Innovation Center in Palo Alto; Raed Shatara, market development for automotive infotainment at [getentity id="22331" comment="STMicroelectronics"]; Joe Hupcey, verification product technologist at [getentity id="22017" e_name="Mentor Graphics"]; ... » read more

What’s Next For Transistors
By Mark LaPedus - 23 Jan, 2017 - Comments: 1

The IC industry is moving in several different directions at once. The largest chipmakers continue to march down process nodes with chip scaling, while others are moving towards various advanced packaging schemes. On top of that, post-CMOS devices, neuromorphic chips and quantum computing are all in the works. Semiconductor Engineering sat down to discuss these technologies with Marie Semeri... » read more

Transferring Skills Getting Harder
By Ed Sperling - 19 Jan, 2017 - Comments: 0

Rising complexity in developing chips at advanced nodes, and an almost perpetual barrage of new engineering challenges at each new node, are making it more difficult for everyone involved to maintain consistent skill levels across a growing number of interrelated technologies. The result is that engineers are being forced to specialize, but when they work with other engineers with different ... » read more

Inside Photomask Writing
By Mark LaPedus - 19 Jan, 2017 - Comments: 0

Hirokazu Yamada, a board member and the director of the Mask Lithography Division of NuFlare, sat down with Semiconductor Engineering to discuss photomask technology, e-beam mask writer trends and other topics. NuFlare is the world’s largest supplier of e-beam mask writers. What follows are excerpts of that conversation. SE: How does the [getkc id="265" kc_name="photomask"] market look in... » read more

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