category: Top Stories

category: Auto, Security & Edge AI

Challenges In Scaling Chips To 2nm And Below
By Ed Sperling - 30 Mar, 2026 - Comments: 0

Key Takeaways Scaling to 2nm and below continues due to power improvements per watt, but progress is much more challenging and costly. Solutions to problems often create other problems due to less margin for tradeoffs, often requiring larger interposers, more chiplets, and more complex packages. New levels of precision are required throughout the design-through-manufacturing flow, re... » read more

Memory Wall Gets Higher
By Brian Bailey - 26 Mar, 2026 - Comments: 1

Key Takeaways An increasing percentage of the chip area is consumed by the same amount of SRAM for each node shrink. The problem is not limited to leading-edge AI, as it will eventually impact even small MCUs and MPUs. Architectural changes may be required. Stacking SRAM chiplets on logic is possible but expensive. SRAM is a vital piece of all computing systems, but its fail... » read more

Data Boom Puts Pressure On NoCs, Fabrics
By Liz Allan - 26 Mar, 2026 - Comments: 0

Key Takeaways: NoC challenges, such as wiring congestion, timing closure, and performance, must be considered in tandem with topology and placement. Topologies can be customized to meet an application’s specific data flow needs, with a system containing multiple topologies to suit different data or zones. What is challenging for one type of system, such as an SoC, switch, or AI chi... » read more

AI Won’t Kill Verification IP, But It Will Redefine It
By Ann Mutschler - 26 Mar, 2026 - Comments: 0

Key Takeaways AI will enhance, not replace, verification IP by automating test generation and debug. Verification IP’s core value will increasingly lie in trust, accountability, and system-level realism, especially as designs become more complex, multi-die, and security-sensitive. AI shifts verification bottlenecks from execution to specification quality, raising expectations for c... » read more

Beating The Heat In 3D Packages
By Laura Peters - 25 Mar, 2026 - Comments: 0

Key Takeaways: Thermal management is a central design constraint, requiring early, thorough planning. Accurate thermal simulation requires AI-driven adaptive meshing and real-world validation. Innovative STCO strategies can drastically reduce GPU peak temperature. As HPC and AI accelerators push power densities to 1kW and beyond, the heat generated by rapidly switching tran... » read more

Auto Ethernet 10BASE-T1S Steps Up, With Tbps On The Horizon
By Liz Allan - 23 Mar, 2026 - Comments: 0

Key Takeaways: Automotive Ethernet, particularly 10BASE-T1S, is emerging as a replacement for CAN in vehicle networks, with higher speeds anticipated for future autonomous and connected cars. The transition to Ethernet in automotive domains is not universal; some OEMs may retain CAN or LIN in certain areas due to cost, and integrating various Ethernet standards can be technically feasib... » read more

Liquid Cooling Drives Other Localized Cooling
By Bryon Moyer - 19 Mar, 2026 - Comments: 0

Key Takeaways: When converting from air to liquid cooling, components without liquid may become too hot. An entire board or system must undergo thermal analysis to ensure that any components that were once cool enough remain cool. Alternative cooling techniques may be needed for components without liquid cooling. Liquid cooling is proving effective at cooling high-power chip... » read more

2D Semiconductors Inch Forward
By Katherine Derbyshire - 19 Mar, 2026 - Comments: 0

Key Takeaways: Diffusing oxygen into 2D materials can improve adhesion properties. Channel-last processes can preserve most of the traditional gate-all-around process flow. Dual-gate MoS2 FETs with graphene contacts take advantage of layer transfer methods. Transition metal dichalcogenides (TMDs) have come a long way since exfoliated flakes were the state of the art, but the... » read more

Advanced Packaging Limits Come Into Focus
By Gregory Haley - 19 Mar, 2026 - Comments: 0

Key Takeaways: Packaging is now a performance variable. Substrate, bonding, and process sequence determine what can be built at scale. Warpage underlies most advanced packaging failures and gets harder to control as package sizes grow. Every proposed solution, such as glass, panel processing, and backside power, solves one problem while creating another. Moore's Law has shif... » read more

AI Design Reshapes Data Management
By Ann Mutschler - 16 Mar, 2026 - Comments: 0

Key takeaways: Integrating AI into chip workflows is pushing companies to overhaul their data management strategies, shifting from passive storage to active, structured, and machine-readable systems. As training and inference workloads grow, data movement, congestion, and energy efficiency become the dominant challenges, often surpassing raw compute capability. Proprietary and comple... » read more

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