Systems & Design
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Developing RISC-V Compute Subsystems

The combination of high-performance RISC-V CPU IP and advanced interconnect technology offers high performance, power efficiency, flexibility, and scalability.

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As demand grows for scalable, efficient, and customized compute, more companies are turning to RISC-V as the preferred architecture for high-performance computing. Tenstorrent and Baya Systems have designed a compute subsystem combining IP from both companies designed to enable AI and HPC use cases. The solution leverages Tenstorrent’s Ascalon processor and Baya’s advanced interconnect technology. This paper showcases a compute subsystem that has been designed to deliver strong performance, power efficiency, flexibility and scalability, making it suitable for cloud, server, data center, and edge computing applications to be used in SoCs and chiplets. This collaboration also enables rapid customization and extension of well-tested compute subsystems.

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