Quantum Computing Architecture Enabling Communication Between Superconducting Quantum Processors (MIT)


A technical paper titled "On-demand directional microwave photon emission using waveguide quantum electrodynamics" was published by researchers at MIT. “Quantum interconnects are a crucial step toward modular implementations of larger-scale machines built from smaller individual components,” says Bharath Kannan PhD ’22, co-lead author of a research paper describing this technique, in a... » read more

Week In Review: Design, Low Power


Top Of The News Google announced it will support the RISC-V architecture with the Android open-source operating system. In a keynote at the RISC-V Summit, Lars Bergstrom, Google's director of engineering for the Android Platform Programming Languages, noted that Android currently has more than 3 billion users and the support of more than 24,000 vendors. "We've been following RISC-V for a very ... » read more

Chip Industry’s Technical Paper Roundup: Jan 3


New technical papers added to Semiconductor Engineering’s library this week. [table id=72 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Hardware Accelerator For Fully Homomorphic Encryption


A technical paper titled "CraterLake: A Hardware Accelerator for Efficient Unbounded Computation on Encrypted Data" was published by researchers at MIT, IBM TJ Watson, SRI International, and University of Michigan. "We present CraterLake, the first FHE accelerator that enables FHE programs of unbounded size (i.e., unbounded multiplicative depth). Such computations require very large cipherte... » read more

Scalable Technique Producing Thin Lightweight Solar Cells That Turn Any Surface Into A Power Source (MIT)


A new technical paper titled "Printed Organic Photovoltaic Modules on Transferable Ultra-thin Substrates as Additive Power Sources" was published by researchers at MIT. "These durable, flexible solar cells, which are much thinner than a human hair, are glued to a strong, lightweight fabric, making them easy to install on a fixed surface. They can provide energy on the go as a wearable power ... » read more

Chip Industry’s Technical Paper Roundup: Dec. 5


New technical papers added to Semiconductor Engineering’s library this week. [table id=67 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for u... » read more

Research Bits: Dec. 5


Protonic programmable resistors for AI Researchers from the Massachusetts Institute of Technology (MIT) developed an analog deep learning processor based on protonic programmable resistors arranged in an array. In the processor, increasing and decreasing the electrical conductance of protonic resistors enables analog machine learning. The conductance is controlled by the movement of protons... » read more

HW Accelerator Architecture for MI Computation With Low Latency, Energy Efficient (MIT)


A new technical paper titled "Efficient Computation of Map-scale Continuous Mutual Information on Chip in Real Time" was published by researchers at MIT. Find the technical paper here. "In this paper, we introduce a new hardware accelerator architecture for MI computation that features a low-latency, energy-efficient MI compute core and an optimized memory subsystem that provides sufficie... » read more

Using Sparseloop in Hardware Accelerator Design Flows (MIT)


A technical paper titled "Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling" was published by researchers at MIT and NVIDIA.  The paper won "Distinguished Artifact Award" at the MICRO 2022 conference. Find the technical paper here.  Published 2022.  Project website is here and github here. Abstract: "In recent years, many accelerators have been proposed to effici... » read more

Optimizing Hardware Capacity, Utilizing Automatic Differentiation to Efficiently Compute Derivatives in Parallel Programming Models


A technical paper titled "Scalable Automatic Differentiation of Multiple Parallel Paradigms through Compiler Augmentation" was published by researchers at MIT (CSAIL), Argonne National Lab, and TU Munich. The paper was a Best Paper Finalist and a Best Student Paper winner at SuperComputing 2022. Find the technical paper here. Published November 2022. The work "demonstrates how Enzyme opti... » read more

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