tag: Synopsys

Designing 2.5D Systems
By Brian Bailey - 15 Mar, 2021 - Comments: 0

As more designs hit the reticle limit, or suffer from decreasing yield, migrating to 2.5D designs may provide a path forward. But this kind of advanced packaging also comes with some additional challenges. How you adapt and change your design team may be determined by where your focus has been in the past, or what you are trying to achieve. There are business, organizational, and technical c... » read more

Week In Review: Design, Low Power
By Jesse Allen - 12 Mar, 2021 - Comments: 0

Tools & IP Codasip unveiled three commercially licensed add-ons to the Western Digital SweRV Core EH1, aiming to allow it to be designed into a wider range of applications. The SweRV Core EH1 is a 32-bit, dual-issue, RISC-V ISA core with a 9-stage pipeline, open-sourced through CHIPS Alliance. The add-ons offer a floating-point unit (FPU) that supports the RISC-V single precision [F] and d... » read more

Domain-Specific Memory
By Brian Bailey - 11 Mar, 2021 - Comments: 2

Domain-specific computing may be all the rage, but it is avoiding the real problem. The bigger concern is the memories that throttle processor performance, consume more power, and take up the most chip area. Memories need to break free from the rigid structures preferred by existing software. When algorithms and memory are designed together, improvements in performance are significant and pr... » read more

Tradeoffs To Improve Performance, Lower Power
By Ann Mutschler - 11 Mar, 2021 - Comments: 0

Generic chips are no longer acceptable in competitive markets, and the trend is growing as designs become increasingly heterogeneous and targeted to specific workloads and applications. From the edge to the cloud, including everything from vehicles, smartphones, to commercial and industrial machinery, the trend increasingly is on maximizing performance using the least amount of energy. This ... » read more

Addressing IC Hyperconvergence Design Challenges
By Aveek Sarkar - 11 Mar, 2021 - Comments: 0

Recently in an article titled “A Renaissance for Semiconductors,” my colleague Michael Sanie highlighted some of the trends that are driving next-generation product development. He detailed how designs targeting new applications are innovating through a combination of advanced process node technologies and heterogeneous integration of stacked die/3D/2.5D systems. Additionally, advanced vert... » read more

MRAM Evolves In Multiple Directions
By Bryon Moyer - 11 Mar, 2021 - Comments: 1

Magnetoresistive RAM (MRAM) is one of several new non-volatile memory technologies targeting broad commercial availability, but designing MRAM into chips and systems isn't as simple as adding other types of memory. MRAM isn’t an all-things-for-all-applications technology. It needs to be tuned for its intended purpose. MRAMs targeting flash will not do as well targeting SRAMs, and vice vers... » read more

Designing ASIPs With Confidence
By Synopsys - 10 Mar, 2021 - Comments: 0

Well-designed ASIPs with a strong SDK combine C/C++ programmability with the power and performance of dedicated hardware. Product families based on ASIP platforms are often highly flexible, capable of addressing multiple market segments with the same silicon and handling updates in the field. They lean well towards software-driven verification with few penalties for late product requirement cha... » read more

Blog Review: March 10
By Jesse Allen - 10 Mar, 2021 - Comments: 0

Siemens EDA's Harry Foster checks out how the maturity of verification processes impact bug escapes in FPGA designs and whether safety critical development processes prevent bugs from escaping to silicon. Synopsys' Dennis Kengo Oka examines the weaknesses and vulnerabilities in automotive keyless entry systems and how security researchers hacked the Tesla Model X key fob. Cadence's Paul M... » read more

Preventing Chips From Burning Up During Test
By Bryon Moyer - 09 Mar, 2021 - Comments: 1

It’s become increasingly difficult to manage the heat generated during IC test. Absent the proper mitigations, it’s easy to generate so much heat that probe cards and chips literally can burn up. As a result, implementing temperature-management techniques is becoming a critical part of IC testing. “We talk about systems, saying the system is good,” said Arun Krishnamoorthy, senior... » read more

Cloud Vs. On-Premise Analytics
By Anne Meixner - 09 Mar, 2021 - Comments: 2

The immense and growing volume of data generated in chip manufacturing is forcing chipmakers to rethink where to process and store that data. For fabs and OSATs, this decision is not one to be taken lightly. The proprietary nature of yield, performance, and other data, and corporate policies to retain tight control of that data, have so far limited outsourcing to the cloud. But as the amount... » read more

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