tag: Synopsys

Making Sure A Heterogeneous Design Will Work
By Ed Sperling - 03 Dec, 2018 - Comments: 0

An explosion of various types of processors and localized memories on a chip or in a package is making it much more difficult to verify and test these devices, and to sign off with confidence. In addition to timing and clock domain crossing issues, which are becoming much more difficult to deal with in complex chips, some of the new devices are including AI, machine learning or deep learning... » read more

Physical Verification In The Cloud
By Manoz Palaparthi - 29 Nov, 2018 - Comments: 0

Cloud computing is no longer “the next big thing”; it has become a mainstream tool for business across many industries. Our own industry of IC Design and EDA, however, has been watching the cloud trend closely from the sidelines. We have been cautious and have not embraced Cloud as much as other industries – until now. What changed this year? What is driving design companies and EDA tool ... » read more

Looking Beyond The CPU
By Brian Bailey - 29 Nov, 2018 - Comments: 0

CPUs no longer deliver the same kind of of performance improvements as in the past, raising questions across the industry about what comes next. The growth in processing power delivered by a single CPU core began stalling out at the beginning of the decade, when power-related issues such as heat and noise forced processor companies to add more cores rather than pushing up the clock frequency... » read more

Fusion Compiler Unified Physical Synthesis
By Synopsys - 28 Nov, 2018 - Comments: 0

This white paper discusses how Fusion Compiler's unified physical synthesis optimization technologies addresses the time-to-market pressure and delivers the quality of results required for advanced process node leading-edge designs. Also learn about how unified physical synthesis seamlessly shares technologies and common engines between synthesis and place-and-route domains to deliver the best ... » read more

Formal Datapath Verification
By Ed Sperling - 28 Nov, 2018 - Comments: 0

J.T. Longino, formal verification application engineer at Synopsys, drills down into how to achieve confidence in datapath designs by applying formal solvers and methods to data transformation areas of a design rather than the control path areas. https://youtu.be/n1zO3GxEZVI     See other tech talk videos here. » read more

Blog Review: Nov. 28
By Jesse Allen - 28 Nov, 2018 - Comments: 0

Arm's Bo Eyole contends that the next generation of machine learning algorithms will have to deal with a vast amount of messy, unlabeled data and takes a look at some of the techniques, such as reinforcement learning and evolutionary computing, now being explored. Cadence's Paul McLellan considers how IP systems are increasingly limited by memory bandwidth rather than compute power and where... » read more

Getting Down To Business On Chiplets
By Ed Sperling - 26 Nov, 2018 - Comments: 0

Government agencies, industry groups and individual companies are beginning to rally around various chiplet models, setting the stage for complex chips that are quicker and cheaper to build using standardized interfaces and components. The idea of putting together different modules like LEGOs has been talked about for the better part of a decade. So far, only Marvell has used this concept co... » read more

Overcoming Gender Stereotypes In Tech
By Ann Mutschler - 23 Nov, 2018 - Comments: 5

Gender inequality in the workplace is more complex and deep-rooted than most studies have shown, and efforts to address those issues are only scratching the surface. The problem runs deeper than just moving women into upper management. It extends all the way through organizations in ways that aren't always obvious. “I've been talking to senior women in engineering and junior women in en... » read more

Blog Review: Nov. 21
By Jesse Allen - 21 Nov, 2018 - Comments: 0

Cadence's Paul McLellan looks at why specialized architectures will be the future of processor development, why general purpose processors are a poor match for AI, and other highlights from the recent Linley Processor Conference. Mentor's Harry Foster focuses on what's happening in FPGA design and the factors that are adding to increasing design and verification complexity. Synopsys' Lewi... » read more

Foundries Prepare For Battle At 22nm
By Mark LaPedus - 19 Nov, 2018 - Comments: 0

After introducing new 22nm processes over the last year or two, foundries are gearing up the technology for production—and preparing for a showdown. GlobalFoundries, Intel, TSMC and UMC are developing and/or expanding their efforts at 22nm amid signs this node could generate substantial business for applications like automotive, IoT and wireless. But foundry customers face some tough choic... » read more

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