tag: Synopsys

Re-Architecting Die-to-Die IO For AI
By Lakshmi Jain - 11 Jun, 2026 - Comments: 0

By Lakshmi Jain and Wei-Yu Ma As AI-driven workloads continue to push the boundaries of compute scale, power efficiency, and bandwidth density, conventional die-to-die interconnect technologies—such as SerDes-based links and wide parallel IO—are increasingly becoming limiting factors. These approaches struggle to meet the growing demands for higher bandwidth density and improved energy e... » read more

Foundation IP: Pushing the Boundaries of Energy-Efficient Chip Design
By Synopsys - 11 Jun, 2026 - Comments: 0

Access “Foundation IP: Pushing the Boundaries of Energy-Efficient Chip Design” to explore six articles that explain how to address SoC design challenges using advanced Foundation IP solutions. Learn how these approaches enable energy efficiency, high performance, and reliability across key applications such as mobile, IoT, AI, HPC, automotive, crypto, and networking. Why read this digest... » read more

PCIe Benefits From AI, Despite Scaling Protocols
By Bryon Moyer - 10 Jun, 2026 - Comments: 0

Key takeaways: PCIe remains a critical technology for non-AI processing. For AI, PCIe will be strengthened by scale-out, agentic AI, and even some scale-up. CXL is seeing uptake, and some even think it could participate in AI processing. PCIe has been the go-to network for most data traffic moving from a processor to devices located elsewhere, which is also what the new data... » read more

High-Speed Manufacturing And In-Field Scan Test Access Via PCI Express For GPIO Limited SoCs
By Ash Patel - 09 Jun, 2026 - Comments: 0

By Ash Patel and Shubharthi Datta, Synopsys, and Chuanyun Fan, Cisco Today’s huge, deep submicron system on chip (SoC) designs present many challenges at every stage of development, from architectural exploration to volume production. This post addresses the specific hurdle of effective and efficient manufacturing tests for these complex devices. It outlines a commercially available soluti... » read more

Why Analog And Mixed-Signal Chips Resist Adaptive Test
By Gregory Haley - 09 Jun, 2026 - Comments: 0

Key Takeaways Analog and mixed-signal test remains heavily specification-based because the measurements do not always produce a single expected result. The absence of objective coverage metrics has historically encouraged conservative test flows, which IEEE 2427-2025 begins to address. Separating device behavior from test-path variation is a prerequisite for any adaptive flow—and h... » read more

Chip Industry Week In Review
By The SE Staff - 05 Jun, 2026 - Comments: 0

Computex in Taiwan: Arm and Nvidia introduced an AI PC platform, RTX Spark, with an Arm-based Grace CPU, Blackwell RTX GPU, and unified memory. Cadence announced a fully autonomous virtual agentic AI design engineer, enabling customers to run dynamic simulations in automated workflows. Intel launched Xeon 6+, its first data-center CPU built on Intel Foundry's 18A process. The company... » read more

Orbital Data Centers Are Souped-Up Satellites – For Now
By Liz Allan - 04 Jun, 2026 - Comments: 0

Key Takeaways: Today’s orbital data centers are better described as compute centers in space, as they resemble satellite constellations more than terrestrial data centers. The most common power solution is sun-synchronous solar at the poles, but this requires a multi-hop data relay from power-hungry compute to standard satellite constellations in the low-orbit mesh, then to Earth. ... » read more

Keeping Security Algorithms Current Is Getting Harder
By Ann Mutschler - 04 Jun, 2026 - Comments: 0

Key Takeaways: Keeping security algorithms current is now a lifecycle challenge that spans chip design, manufacturing, deployment, and long-term maintenance across the supply chain. To stay ahead of emerging threats — especially post-quantum risks — hardware must be built with cryptographic agility, secure roots of trust, and reliable update mechanisms from the start. The bigge... » read more

AI-Defined Vehicles Increase Pressure On Auto Ethernet Reliability
By Liz Allan - 04 Jun, 2026 - Comments: 0

Key Takeaways: For AI-defined vehicles and onboard agentic AI, Automotive Ethernet provides high bandwidth for sensor data fusion, TSN ensures low latency and synchronization for real-time decisions, and MACsec secures the data link. Time-sensitive networking (TSN) is an essential protocol for ensuring 10BASE-T1S delivers data to where it needs to go on time. Still, it becomes less esse... » read more

Delivering Automotive-Grade Quality With Customized FinFET Foundation IP
By Andrew Appleby - 04 Jun, 2026 - Comments: 0

By Andrew Appleby, Daryl Seitzer, and Nafiz Ahmed The growing compute demands of modern vehicles are forcing chipmakers to venture into new territory. To deliver increased processor performance for engine and body control systems, one leading semiconductor supplier knew it had to move to an automotive-qualified FinFET technology process — a leap that would introduce significant new desi... » read more

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