The Week In Review: Design


Legal Mentor Graphics won a $36 million award plus royalties stemming from a patent infringement case involving EVE (Emulation & Verification Engineering), an emulation company that was purchased by Synopsys in 2012. A U.S. District Court jury in the District of Oregon found that EVE had directly and indirectly infringed on a 2001 patent entitled "Method and apparatus for gate-level simula... » read more

Blog Review: Oct. 15


Obesity makes your liver age faster, but you'll need a sophisticated biological clock to see that. Ansys' Bill Vandermark uncovers the top 5 engineering articles of the week. This one includes cyborg horses and an implanted prosthetic arm. Mentor's Colin Walls takes a look at "hard" and "soft" real time. It sounds like something out of a Salvador Dali painting. Rambus' Aharon Etengoff t... » read more

Will There Be A DDR5?


DDR4 rollouts have begun. And in the DRAM world that begs the question, 'What comes next?' The answer isn't so obvious. While there have been suggestions inside of JEDEC — the Joint Electron Device Engineering Council, which has overseen the standards for double-data-rate synchronous DRAM — to develop a DDR5 standard, it's not the only solution being considered. And in the minds of some... » read more

The Week In Review: Design


IP Synopsys rolled out verification IP for mobile PCIe, including built-in M-PHY, for UVM environments. Cadence introduced MIPI SoundWire controller IP, which allows bi-directional digital communication using low gate count and minimal complexity. Deals ARM and TSMC rolled out a road map for 64-bit ARM-based processors at 10nm. The companies said the early pathfinding work is expected t... » read more

Software Before Hardware?


The emphasis on battery life in wearable electronics, including always-on sensors, and the cost of powering and cooling racks of servers inside of data centers, are beginning to impact the formula for designing systems. Power is now a critical design element, but it's also one of the most stubborn to tackle. While ASICs, SoCs and FPGAs all have focused on being able to efficiently run softwa... » read more

Optimizing Analog For Power At Advanced Nodes


As any engineering manager will tell you, analog and digital engineers seem like they could be from different planets. While this has changed somewhat over time, [getkc id="52" comment="analog"] is still something of a mystery to many in [getkc id="81" kc_name="SoC"] design teams. Throw power management into the mix and things really get interesting. Improvements in analog/mixed-signal tools... » read more

Memory VIP


As the consumer market, and the mobile segment in particular, continues to demand more features and more performance in their gadgets, the designer community is confronted with myriad challenges of delivering on those demands – not the least of which is verifying compliance of ever-evolving protocols that enable the connection of everything within the system on chip (SoC), and the connection ... » read more

Memory Directions Uncertain


Semiconductor Engineering sat down with a panel of experts to find out what is happening in world of memories. Taking part in the discussion are [getperson id="11073" comment="Charlie Cheng"], chief executive officer at [getentity id="22135" e_name="Kilopass Technology"]; Navraj Nandra, senior director of marketing for Analog/Mixed signal IP, embedded memories and logic libraries at [getentity ... » read more

Energy Boost For Power Standards


If the amount of standards work and industry effort that is being expended on a given topic is any indicator of the growing importance of a design concern, then power has most certainly become the hottest topic in the industry. Thankfully, it seems as if everyone has learned their lessons from the CPF/[gettech id="31044" t_name="UPF"] struggles and is attempting to coordinate activities, while ... » read more

Blog Review: Oct. 8


Mentor's Robin Bornoff examines the thickness of leg hair and just how much of a drag it causes for bicyclists. More hair equals more drag, and thicker hair is worse. Ansys' Justin Nescott routes out the top five engineering articles of the week. Of particular note: The world's most precise clock, which loses one second every 13.8 billion years. Cadence's Richard Goering puts some conte... » read more

← Older posts Newer posts →