Back-End Automation Tackles Growing Complexity


Experts at the table: Semiconductor Engineering sat down to discuss back-end automation challenges in advanced packaging with Michael Lowman, senior product marketing manager for Data Analytics at Cohu; Aftkhar Aslam, CEO at yieldWerx, Woo Young Han, product marketing director at Onto Innovation; and Lihong Cao, senior director of engineering and technical marketing for ASE. What follows are ex... » read more

Are You Using Structural Patterns In An SLT Environment?


Extending the in‑field life of your silicon is essential for long‑term success and for staying ahead of your competitors in today’s rapidly evolving digital world of data centers, automotive and cellular chipsets, and AI applications. For those reasons, it’s increasingly important to test your silicon in a System Level Test (SLT) environment. Testing in an SLT environment offers many be... » read more

Why Scan Diagnosis Should Be Part Of Every Fabless Company’s Yield Playbook


A fabless semiconductor company's world spins around two things, pushing design differentiation and getting those designs to market quickly and profitably. Yield isn’t just a manufacturing KPI. It's a business lever. And one of the most under-used levers in modern fabs is scan diagnosis, the practice of turning deterministic test infrastructure and failing test data into precise and action... » read more

High-Throughput Image Sensors: Smart Testing Powers Progress


In the race to produce higher resolution image sensors—now pushing beyond 500 megapixels—the industry faces significant challenges. These sensors aren’t just capturing more pixels; they’re handling massive streams of data, validating intricate on-chip AI functions, and doing it all at breakneck speeds. For manufacturers, the challenge is as unforgiving as it is critical: test more compl... » read more

Advanced Packaging: Driving Innovation, Performance, And New System Capabilities


Advanced packaging is no longer operating behind the scenes. The technology of advanced packaging is helping to sustain the speed of the semiconductor industry’s improvement in power and performance, even as the Moore’s Law roadmap for wafer-level scaling comes under strain. At the Advanced Packaging Conference during SEMICON Europa 2025 in Munich, global experts examined the growth tr... » read more

Scalable End-To-End Test Solutions For Today’s Complex SoCs


By Srikanth Venkat Raman and Sri Ganta Today’s highly complex and large system on chip (SoC) devices and systems present many challenges to be addressed from manufacturing tests to the field while meeting stringent requirements for test costs, test quality, yield, debug, and turn-around-times. Scalable and efficient end-to-end test solutions that scale to large and complex SoC design cores... » read more

Adaptive Test Gaining Ground For HPC And AI Chips


Adaptive test is starting to gain traction for high-performance computing and AI chips as test programs that rely on static limits and fixed test sequences reach their practical limits. The growing complexity of multi-die assemblies and power delivery, along with increased stresses, are forcing a shift toward real-time, data-driven optimization at the test cell. “It’s the same old pro... » read more

Invisible Interfaces: The Hidden Challenge Behind Every Great Image Sensor


When you snap a photo on your phone or rely on a car’s camera for lane detection, you’re trusting an unseen network of technologies to deliver or interpret image data flawlessly. But behind the scenes, the interface between the image sensor and its processor is doing the heavy lifting, moving megabtyes of data without error or delay. While much of the industry conversation focuses on adv... » read more

Boosting Production Performance: Ensuring Only Known-Good Sockets Enter Your Line


Efficient, stable, and high-yield semiconductor production depends on one often-overlooked factor: the health of your test sockets. In many factories, socket maintenance and inspection practices haven't kept pace with the demands of today’s high-density, high-speed packages. The result? Hidden marginal pins, unexpected downtime, multisite yield variation, and inflated manufacturing costs. ... » read more

Beyond The Core: Tackling System-Wide Debugging For Complex SoCs


The world of System-on-Chips (SoCs) is evolving – with the advancement of generative AI, the increasing demand for high-performance compute, and the innovative shift towards multi-chiplet architectures, system complexity is advancing at an increased pace. And with complexity comes an even greater challenge: debugging complexity. Silent data corruption, elusive timing-sensitive bugs, and i... » read more

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