tag: ANSYS

Week In Review: Manufacturing, Test
By Mark LaPedus - 13 Dec, 2019 - Comments: 0

Chipmakers and OEMs TrendForce has released its projected foundry rankings for the fourth quarter of 2019. TSMC remains in first place, followed by Samsung, GlobalFoundries and UMC, according to the firm. “TrendForce projects the foundry industry’s 4Q19 revenue performance to exceed previous expectations,” according to the firm. “Nonetheless, the ongoing U.S-China trade war and uncerta... » read more

Week In Review: Design, Low Power
By Jesse Allen - 13 Dec, 2019 - Comments: 0

Rambus finalized its acquisition of the silicon IP, secure protocols and provisioning business from Verimatrix, formerly Inside Secure, for $45 million at closing, and up to an additional $20 million, subject to certain revenue targets in 2020. RISC-V SiFive unveiled two new product families. The SiFive Apex processor cores target mission-critical processors with Size, Weight, and Power (SW... » read more

Interdependencies Complicate IC Power Grid Design
By Ann Mutschler - 12 Dec, 2019 - Comments: 0

Creating the right power grid is a growing problem in leading-edge chips. IP and SoC providers are spending a considerable amount of time defining the architecture of logic libraries in order to enable different power grids to satisfy the needs of different market segments. The end of Dennard scaling is one of the reasons for the increased focus. With the move to smaller nodes, the amount of... » read more

Combining Digital Twins And IoT In The Cloud
By Sameer Kher - 12 Dec, 2019 - Comments: 0

Engineers are tasked with the continuous improvement of the products, services and systems they design. The trouble is, once a product is out in the field, it’s hard to know how that design is performing — or being used. By coupling digital twin and internet of things (IoT) technology, engineers can get a better idea of a product’s real-world performance. As a reminder, digital twins a... » read more

Blog Review: Dec. 11
By Jesse Allen - 11 Dec, 2019 - Comments: 0

Arm's Urmish Thakker investigates ways to make recurrent neural networks run on resource constrained devices with limited cache and compute resources by reducing the number of RNN computations, without the need to retrain the original RNN model. Mentor's Brent Klingforth digs into the challenges of designing rigid-flex PCBs and how advanced capabilities in modern tools, like awareness of sta... » read more

Three Levers for Accelerating Lightweighting in Aerospace: Advanced Materials, Additive Manufacturing, Materials Intelligence
By Ansys - 11 Dec, 2019 - Comments: 0

Accelerating the delivery of lighter weight aircraft is possible by focusing on three key levers: more extensive use of advanced materials, broader adoption of new manufacturing techniques and extraction of more value from existing materials data. This white paper delves into the opportunities and challenges presented by each, and provides best practices for reducing fuel costs and emissions th... » read more

Week In Review: IoT, Security, Auto
By SE Staff - 06 Dec, 2019 - Comments: 0

Internet of Things SiFive is bringing RISC-V to IoT makers and university developers through the RISC-V-based SiFive Learn Initiative, an open-source learning package that can be used to create a low-cost RISC-V hardware compatible with AWS IoT Core. The development platform SiFive Learn Inventor has a software package and education enablement course. It includes: The programmable SiFive Lear... » read more

Blog Review: Dec. 4
By Jesse Allen - 04 Dec, 2019 - Comments: 0

Arm's Rupal Gandhi digs into the Cell-Aware Test methodology to deterministically target the growing number of defects that occur within the cells, the process of CAT library generation, and compares the static and transition patterns generated. Cadence's Paul McLellan shares highlights from the recent WOSET event with a look at the big drivers for the current interest in open-source EDA too... » read more

Blog Review: Nov. 27
By Jesse Allen - 27 Nov, 2019 - Comments: 0

Arm's Ben Fletcher digs into what's needed to make wireless 3D integration a reality from a tool to automate the design and optimization process for inductors used in wireless 3D-ICs to exploring how the data can be encoded in the transceiver to reduce power consumption. Cadence's Paul McLellan listens in as Eli Singerman of Intel explains the importance of platform security and why firmware... » read more

Electromagnetic Challenges In High-Speed Designs
By Ed Sperling - 25 Nov, 2019 - Comments: 0

ANSYS’ Anand Raman, senior director, and Nermin Selimovic, product sales specialist, talk with Semiconductor Engineering about how to deal with rising complexity and tighter tolerances in AI, 5G, high-speed SerDes and other chips developed at the latest process nodes where the emphasis is on high performance and low power. » read more

← Older posts Newer posts →

  • Sponsors

  • Standards/Organizations

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy