Insight Into The Evolution Of Vehicle Electrification


This SAE 2018 Reader Survey was conducted on behalf of ANSYS to discover subscribers’ level of involvement with vehicle electrification trends and technologies. Survey respondents work in the automotive industry, with corporate management, management and design engineering job functions and a technology interest in power and propulsion. To read more, click here. » read more

Blog Review: Oct. 10


In a video, Cadence's Megha Daga dives into sparsity in neural networks and how it affects bandwidth, performance, and power efficiency. In a video, Mentor's Colin Walls takes a look at efficient embedded code, and why that means different things at different times. Synopsys' Eric Huang argues that in the realm of video standards, HDMI, DisplayPort, and USB Type-C are set to continue comp... » read more

Week In Review: Design, Low Power


Mirabilis Design debuted an AI-driven tool for performance analysis and architecture exploration of SoCs and embedded systems. VisualSim AI Processor Generator creates pipeline-accurate models that have port integration with standard buses and memories, which is used to compare different processor families, optimize the specification and identify system bottlenecks. The generated model supports... » read more

Blog Review: Oct. 3


Applied's Buvna Ayyagari-Sangamalli notes that the requirements of AI are challenging the entire design ecosystem, and while new materials are necessary, so is keeping up the current pace of architecture and EDA development. Mentor's Joe Hupcey III digs into how to handle counters effectively with formal by reducing their size or replacing them with abstract models to allow formal engines to... » read more

Blog Review: Sept. 26


VLSI Research's Dan Hutcheson chats with GlobalFoundries CEO Tom Caulfield about the company's changing strategy, how the company got to its present point, and how many companies will be using leading edge technologies. Synopsys' Taylor Armerding looks for what's changed (or not) for the state of software security and breach disclosure regulations in the year since the massive Equifax data b... » read more

Week In Review: Design, Low Power


Tools & IP Cadence unveiled deep neural-network accelerator (DNA) AI processor IP, Tensilica DNA 100, targeted at on-device neural network inference applications. The processor is scalable from 0.5 TMAC (Tera multiply-accumulate) to 12 TMACs, or 100s of TMACs with multiple processors stacked, and the company claims it delivers up to 4.7X better performance and up to 2.3X more performance p... » read more

Auto Chip Design, Test Changes Ahead


The automotive industry’s unceasing demand for performance, coupled with larger and more complex processors, are driving broad changes in how electronics are designed, verified and tested. What's changing is that these systems, which include AI-oriented logic developed at the most advanced process nodes, need to last several times longer than traditional IT and consumer devices, and they n... » read more

Chipping Away At Functional Safety Flaws In Automotive Electronics


Today’s automobiles are packed with electronics. From autonomous driving support and infotainment systems to mission-critical functions like braking, a car’s performance depends on the reliability of these electronics systems. While the semiconductors that lie at the heart of these systems have been not been a focus in the past, today their reliability is coming under closer scrutiny by bot... » read more

Aging In Advanced Nodes


Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; Magdy Abadir, vice president of marketing at ... » read more

Process Corner Explosion


The number of corners that need to be checked is exploding at 7nm and below, fueled by everything from temperature and voltage to changes in metal. Lowering risk and increasing predictability of an SoC at those nodes starts with understanding what will happen when a design is manufactured on a particular foundry process, captured in process corners. This is basically a way of modeling what i... » read more

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