How To Sleep Easier If You Test Auto ICs For A Living


Last month, I looked at the product definition process of automotive ICs, using the $7 billion microcontroller market as an illustration of design exploration to optimize performance, features, die size and product cost. Now I’d like to look at the back end of the process — the final IC testing that’s still critical no matter how sound the upfront work in defining a featuring set and aptl... » read more

The Road To Autonomous Driving Is Paved With New Opportunities For Chip Companies


The migration from human-driven to self-driven vehicles in the next few years will provide the semiconductor industry with new opportunities. Vehicles on the road today have so far featured only a few digital enhancements and even less automation. Indeed, the most noticeable enhancements have been made in the advancement of the infotainment console within the dashboard – the ability to str... » read more

Securing Automotive Over-The-Air (SOTA) Updates


Modern vehicles are essentially a network of networks – equipped with a range of embedded communication methods and capabilities. Consequently, there is broad industry consensus that vehicle cyber security should rank as a top priority for the automotive sector. In this context, automotive OEMs have begun to provide secure over-the-air (SOTA) updates for various systems. Recently, the non-... » read more

Enabling Automotive Design


Falling automotive electronics prices, propelled by advances in chip manufacturing and innovations on the design side, are driving a whole new level of demand across the automotive industry. Innovations that were introduced at the luxury end of the car market over the past couple years already are being implemented in more standard vehicles. The single biggest driver of change in the automo... » read more

Big Challenges, Changes For Debug


By Ann Steffora Mutschler & Ed Sperling Debugging a chip always has been difficult, but the problem is getting worse at 7nm and 5nm. The number of corner cases is exploding as complexity rises, and some bugs are not even on anyone's radar until well after devices are already in use by end customers. An estimated 39% of verification engineering time is spent on debugging activities the... » read more

Tech Talk: Verification


Frank Schirrmeister, Cadence's senior group director for verification platforms, talks about what's changing in verification with 5G, machine learning, greater connectivity, advanced packaging, and the growing need to build security into designs. https://youtu.be/GMF8BkmdJzE » read more

Understanding How To Assess Tool Confidence Levels For ISO 26262


ISO 26262, the automotive functional safety standard, requires the assessment of software Tool Confidence Levels (TCLs). Some SoC designers are under the impression that all tools must be classified with a TCL1. In reality, the goal is to classify your tools accurately for your specific situation and use case. This white paper provides insight on assessing TCLs that are consistent with ISO 2626... » read more

Blog Review: Nov. 29


ANSYS' Robert Harwood offers a reminder that autonomous and assisted driving technology are still very much works in progress, and flawed ones at that. It will take an estimated 5 billion to 10 billion road miles to effectively train self-driving algorithms. So far, Google has logged about 3.5 million miles. Along the same lines, Mentor's Paul Johnston takes a look at the electric car market... » read more

Here Comes High-Res Car Radar


A dozen or so startups are developing high-resolution radar chips that use various modulation schemes and processes, such as CMOS, FD-SOI and even metamaterials. In theory, high-resolution radar could boost the capabilities of today’s radar for cars, as well as eliminate the need for a separate LiDAR system. But the technology is still in the research stage and has yet to be proven commerc... » read more

Move Data Or Process In Place? (Part 2)


Chip architectures, and even local system architectures, long have found that the best way to improve total system performance and power consumption is to move memory as close to processors as possible. This has led to cache architectures and memories that are tuned for those architectures, as discussed in part 1 of this article. But there are several tacit assumptions made in these architectur... » read more

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