tag: Cadence

Variables Complicate Safety-Critical Device Verification
By Ann Mutschler - 01 Jul, 2020 - Comments: 0

The inclusion of AI chips in automotive and increasingly in avionics has put a spotlight on advanced-node designs that can meet all of the ASIL-D requirements for temperature and stress. How should designers approach this task, particularly when these devices need to last longer than the applications? Semiconductor Engineering sat down to discuss these issues with Kurt Shuler, vice president of... » read more

Blog Review: June 30
By Jesse Allen - 30 Jun, 2020 - Comments: 0

Cadence's Paul McLellan examines Fully Homomorphic Encryption, which allows for operations to be performed on encrypted data without decrypting it, and why it's now entering the realm of practicality. Mentor's Shivani Joshi explains the basics of using keepouts to prevent the placement of specific or all design items within a specified area and why they can make or break a first pass at crea... » read more

Gaps Emerging In System Integration
By Brian Bailey - 29 Jun, 2020 - Comments: 0

The system integration challenge is evolving, but existing tools and methods are not keeping up with the task. New tools and flows are needed to handle global concepts, such as power and thermal, that cannot be dealt with at the block level. As we potentially move into a new era where IP gets delivered as physical pieces of silicon, this lack of an accepted flow will become a stumbling block. ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 26 Jun, 2020 - Comments: 0

Fast Arm-based supercomputer Japan has taken the lead in the supercomputer race, jumping ahead of the U.S. But China continues to make its presence felt in the arena. Fugaku, an ARM-based supercomputer jointly developed by Japan’s Riken and Fujitsu, is now ranked the world’s fastest supercomputer in the 55th TOP500 list. Fugaku turned in a high performance Linpack (HPL) result of 415.5... » read more

Hyperscale And Artificial Intelligence Are Reshaping Value Chains
By Frank Schirrmeister - 25 Jun, 2020 - Comments: 0

Observing electronic ecosystems and value chains change over time is fascinating. For instance, the design chain for mobile devices fundamentally changed over the past two decades with waves of disaggregation and aggregation. Today, the area of computing and data centers is amid tectonic shifts and transformation, with the combination of hyperscale, networking, artificial intelligence (AI), and... » read more

Open-Source Hardware Momentum Builds
By Brian Bailey - 25 Jun, 2020 - Comments: 2

Open-source hardware continues to gain ground, spearheaded by RISC-V — despite the fact that this processor technology is neither free nor simple to use. Nevertheless, the open-source hardware movement has established a solid foothold after multiple prior forays that yielded only limited success, even for processors. With demand for more customized hardware, and a growing field of startups... » read more

Over-Design, Under-Design Impacts Verification
By Ann Mutschler - 25 Jun, 2020 - Comments: 0

Designing a complex chip today and getting it out the door on schedule and within budget — while including all of the necessary and anticipated features and standards — is forcing engineering teams to make more tradeoffs than in the past, and those tradeoffs now are occurring throughout the flow. In an ideal system design flow, design teams will have done early, pre-design analysis to se... » read more

Rising To Meet The Thermal Challenge
By Cadence - 24 Jun, 2020 - Comments: 0

Thermal effects on electrical performance have always existed; processor speed limits are set by thermal limits, and power has been a key concern for the mobile and datacenter markets for a decade. Increased electrical content logically generates more heat, which affects system performance. For example, in the automotive market, ADAS and infotainment systems are drastically increasing automotiv... » read more

Blog Review: June 24
By Jesse Allen - 24 Jun, 2020 - Comments: 0

Cadence's Paul McLellan provides an overview of the new IEEE 1838 standard for manufacturing test of 3D stacked ICs and how it aims to enable testing of multi-die chiplet-based designs. In a video, Mentor's Colin Walls investigates the scope and lifetime of pointers in embedded applications. A Synopsys writer checks out the latest mobile memory standard, JESD209-5A, and the enhancements i... » read more

What’s After PAM-4?
By Bryon Moyer - 23 Jun, 2020 - Comments: 1

[This is part 2 of a 2-part series. Part 1 can be found here.] The future of high-speed physical signaling is uncertain. While PAM-4 remains one of the key standards today, there is widespread debate about whether PAM-8 will succeed it. This has an impact on everything from where the next bottlenecks are likely to emerge and the best approaches to solving them, to how chips, systems and p... » read more

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