SoCs Go Mainstream


By Ed Sperling The monolithic ASIC, which has been the bread-and-butter of chipmakers for decades, is giving way to systems on a chip among mainstream chipmakers and at mainstream process nodes. This shift has been overhyped, overpromised and slow to materialize. While SoCs have been common for years in mobile electronics and for high-performance platforms such as gaming consoles, they have... » read more

New Winners And Losers


The realignment of the semiconductor industry has begun, most of it beneath the radar screen. In a disaggregated supply chain, any piece in isolation looks insignificant. But taken together, these shifts begin to paint a picture of a broad realignment and refocusing of the entire industry that ultimately will cement the fortunes of some and create new winners and losers out of others. The fi... » read more

“Selling System-Level Design”


By Frank Schirrmeister Between reviewing what happened in 2011, trying to predict what 2012 will have in store, and planning activity for the system-level design product line I am working on at Cadence, I ran across my notes and the summary of Jeff Cox’s book “Selling the Wheel”. As Silicon Valley high tech marketers we all have been accustomed to Geoffrey Moore’s “Crossing the Ch... » read more

Experts At The Table: IP


By Ed Sperling Low-Power Engineering sat down to talk about IP with John Goodenough, vice president of design technology and automation at ARM; Simon Butler, CEO of Methodics; Navraj Nandra, senior director of marketing for DesignWare analog and mixed signal IP at Synopsys, and Neil Hand, product marketing group director at Cadence. What follows are excerpts of that discussion. LPE: Are w... » read more

Experts At The Table: ESL Reality Check


By Ed Sperling System-Level Design sat down to discuss electronic-system-level design with Stephen Bailey, director of emerging technologies for the design verification technology group at Mentor Graphics; Michael McNamara, vice president and general manager of Cadence’s System-Level Division; Ghislain Kaiser, CEO of DOCEA Power, and Shawn McCloud, vice president of marketing at Calypto. Wh... » read more

The Trouble With Power Models


By Ed Sperling Talk with any large systems vendor about power modeling and, with very few exceptions, they’re still using a mix of spreadsheets and lower-level models—no matter how far along they are in ESL adoption and in modeling other parts of an IC. Power has crept up on even the biggest companies, which have never really figured out how to implement it into their design flows. For ... » read more

Flexibility Vs. Portability In Emulation


Complete and exhaustive verification of low-power designs requires a substantial effort and part of this includes running real applications on the hardware. Simulators fall short as designers realize that the so-called testbenches they create are artificial and don’t necessarily represent typical applications. As such, this is the sweet spot for emulators, also known as hardware accelerators,... » read more

Avoiding Chip Melt


By Ann Steffora Mutschler Assertions. Just the term conjures images of writing boring lines of code to feed into a simulator. But for engineering teams working at the 40nm node, the pain of making sure their verification is complete and accurate is real—and so is the potential for literally melting silicon if something goes wrong. With this in mind, ‘boring’ goes out the window and gets ... » read more

Experts vs. Expertise


By Ed Sperling The trend in IC design—particularly for large, complex SoCs—is specialization among engineers. There are specialists for layout, for verification, for DFM, for test, and for software, among other things. And there are experts who have a smattering of many of the pieces and can oversee the integration and testing. Power is different. Because power affects every part of a d... » read more

Shoot The Engineer


By Luke Lang Many years ago as a junior engineer right out of college, my manager explain to me the concept of “shoot the engineer.” Engineers are trained to be perfectionists. We want to design the best mouse trap ever. However, the engineer that designs the first working mouse trap takes home the money. Given another day, another week, or another month, we can always improve upon our cur... » read more

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