Integrated Modular Firmware Solutions: A Vital Component Of Custom Silicon Chiplet Architecture Designs


By Marc Meunier and Srini Narayana The shift from monolithic SoC designs to chiplet-based architecture isn’t just a packaging innovation. It’s a fundamental rethinking of how custom silicon is designed, manufactured, and deployed. This transition is driven by the growing impracticality of scaling large monolithic dies at advanced nodes. As die sizes increase, so do the costs, yield ri... » read more

Using AI/ML To Find And Correlate IC Test Data


What causes low yield in wafers? Usually it's due to design or process changes, but sometimes yield issues occur even if there haven't been any changes from one manufacturing lot to the next. Finding the cause requires some sleuthing, and the best approach for pinpointing problems is to mine design, process, and manufacturing data, and to correlate that data by date and time, by which equipment... » read more

EBook: Helping To Realize Chiplet Ambitions


The future of physical AI, from autonomous vehicles to robotics and aerospace, depends on overcoming the limitations of monolithic SoCs. As computing demands grow, a shift to scalable, modular, and reusable chiplet-based architectures is essential. This transition presents new challenges, from ensuring interoperability to managing complex system-level integration. How can you navigate this land... » read more

Microelectronics and Advanced Packaging Technologies Roadmap 2.0 (SRC)


The Semiconductor Research Corporation just released its Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap 2.0, a comprehensive update to the industry’s first 3D semiconductor roadmap. The roadmap includes contributions of over 370 experts from 132 organizations, with updated content and a new chapter on digital twins and their applications. The roadmap was funded by the ... » read more

Multi-Die Verification


Chiplets offer unprecedented flexibility in high-performance designs, but they also add new challenges on the verification side. Changing out a chiplet, or adding a new one, can mean having to re-verify an entire multi-die system, a problem that becomes even more complicated if those chiplets are developed by different vendors. Paul Graykowski, director of product marketing at Cadence Design Sy... » read more

On-Package Memory With UCIe To Improve Bandwidth Density And Power Efficiency (AMD, Intel Corp.)


A new technical paper titled "On-Package Memory with Universal Chiplet Interconnect Express (UCIe): A Low Power, High Bandwidth, Low Latency and Low Cost Approach" was published by researchers at Intel Corporation and AMD. Abstract "Emerging computing applications such as Artificial Intelligence (AI) are facing a memory wall with existing on-package memory solutions that are unable to meet ... » read more

A Modular System In Package Approach For Automotive Short Range Radar Applications (Ruhr Univ. Bochum, Fraunhofer et al.)


A new technical paper titled “Leveraging Modularity of Chiplets to Form a 4×4 Automotive FMCW-Radar in an eWLB-Package” was published by researchers at Ruhr University Bochum, Fraunhofer Institute, University Bremen, Infineon and WavesenseDD GmbH. Abstract “Dividing a System on Chip (SoC) into multiple smaller chiplets and embedding them into a single package has gained significant t... » read more

Distributed Authentication Framework Leveraging Multi-Party Computation In A Scalable Tree-Based Architecture (Univ. of Central Florida, Louisiana State)


A new technical paper titled "AuthenTree: A Scalable MPC-Based Distributed Trust Architecture for Chiplet-based Heterogeneous Systems" was published by researchers at University of Central Florida and Louisiana State University. Abstract "The rapid adoption of chiplet-based heterogeneous integration is reshaping semiconductor design by enabling modular, scalable, and faster time-to-market s... » read more

How To Cool 3D-ICs


Experts at the Table: Semiconductor Engineering sat down to discuss how to cool 3D-ICs and what's missing from the tool chain today, with John Ferguson, senior director of product management at Siemens EDA; Mick Posner, senior product group director for chiplet at IP solutions in Cadence's Compute Solutions Group; Mo Faisal of Movellus; Chris Mueth, new opportunities business manager at Keysigh... » read more

Preparing For The Multiphysics Future Of 3D-ICs


3D integrated circuits (3D ICs) are emerging as a revolutionary approach to design, manufacturing and packaging in the semiconductor industry. Offering significant advantages in size, performance, power efficiency and cost, 3D ICs are poised to transform the landscape of electronic devices. However, with 3D ICs come new design and verification challenges that must be addressed to ensure success... » read more

← Older posts Newer posts →