tag: chiplets

Multi-Die Verification
By Ed Sperling - 13 Oct, 2025 - Comments: 1

Chiplets offer unprecedented flexibility in high-performance designs, but they also add new challenges on the verification side. Changing out a chiplet, or adding a new one, can mean having to re-verify an entire multi-die system, a problem that becomes even more complicated if those chiplets are developed by different vendors. Paul Graykowski, director of product marketing at Cadence Design Sy... » read more

On-Package Memory With UCIe To Improve Bandwidth Density And Power Efficiency (AMD, Intel Corp.)
By Technical Paper Link - 10 Oct, 2025 - Comments: 0

A new technical paper titled "On-Package Memory with Universal Chiplet Interconnect Express (UCIe): A Low Power, High Bandwidth, Low Latency and Low Cost Approach" was published by researchers at Intel Corporation and AMD. Abstract "Emerging computing applications such as Artificial Intelligence (AI) are facing a memory wall with existing on-package memory solutions that are unable to meet ... » read more

A Modular System In Package Approach For Automotive Short Range Radar Applications (Ruhr Univ. Bochum, Fraunhofer et al.)
By Technical Paper Link - 03 Oct, 2025 - Comments: 0

A new technical paper titled “Leveraging Modularity of Chiplets to Form a 4×4 Automotive FMCW-Radar in an eWLB-Package” was published by researchers at Ruhr University Bochum, Fraunhofer Institute, University Bremen, Infineon and WavesenseDD GmbH. Abstract “Dividing a System on Chip (SoC) into multiple smaller chiplets and embedding them into a single package has gained significant t... » read more

Distributed Authentication Framework Leveraging Multi-Party Computation In A Scalable Tree-Based Architecture (Univ. of Central Florida, Louisiana State)
By Technical Paper Link - 02 Oct, 2025 - Comments: 0

A new technical paper titled "AuthenTree: A Scalable MPC-Based Distributed Trust Architecture for Chiplet-based Heterogeneous Systems" was published by researchers at University of Central Florida and Louisiana State University. Abstract "The rapid adoption of chiplet-based heterogeneous integration is reshaping semiconductor design by enabling modular, scalable, and faster time-to-market s... » read more

How To Cool 3D-ICs
By Ed Sperling - 01 Oct, 2025 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss how to cool 3D-ICs and what's missing from the tool chain today, with John Ferguson, senior director of product management at Siemens EDA; Mick Posner, senior product group director for chiplet at IP solutions in Cadence's Compute Solutions Group; Mo Faisal of Movellus; Chris Mueth, new opportunities business manager at Keysigh... » read more

Preparing For The Multiphysics Future Of 3D-ICs
By Siemens EDA - 29 Sep, 2025 - Comments: 0

3D integrated circuits (3D ICs) are emerging as a revolutionary approach to design, manufacturing and packaging in the semiconductor industry. Offering significant advantages in size, performance, power efficiency and cost, 3D ICs are poised to transform the landscape of electronic devices. However, with 3D ICs come new design and verification challenges that must be addressed to ensure success... » read more

The Future Of SoC Design Is Data Movement
By Andy Nightingale - 25 Sep, 2025 - Comments: 0

The semiconductor industry is experiencing rapid advances in chiplet adoption, high-bandwidth memory, Compute Express Link (CXL) fabrics, and automotive zonal architectures. As we move into the second half of 2025, the only sustainable path forward is a layered, physically aware, and automated interconnect methodology that can keep pace with escalating complexity. This article is Part Two of... » read more

First Forays Into True 3D-IC Designs
By Ed Sperling - 25 Sep, 2025 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss initial forays into 3D-ICs and what problems early adopters will encounter, with John Ferguson, senior director of product management at Siemens EDA; Mick Posner, senior product group director for chiplet at IP solutions in Cadence's Compute Solutions Group; Mo Faisal of Movellus; Chris Mueth, new opportunities business manager... » read more

Benefits And Challenges Of Using Chiplets
By Ed Sperling - 24 Sep, 2025 - Comments: 0

The move to chiplets opens the door to more features than can be packed into a reticle-sized SoC. That potentially means more processing power, simpler designs, and higher yields. But it's not as simple as swapping LEGO blocks into a chassis. Ashley Stevens, director of product management and marketing at Arteris, talks with Semiconductor Engineering about the challenges of using coherent versu... » read more

The Future Of Verification
By Brian Bailey - 24 Sep, 2025 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the state of functional verification with Mohan Dhene, director for architecture and design at Alphawave Semi; Andy Nightingale, vice president for product management and marketing at Arteris; Dinesha Rao, senior group director for software engineering at Cadence; Chris Mueth, new opportunities business manager at Keysight; Gor... » read more

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