tag: EDA

Electronic System Design In 2015: Busting Through Bottlenecks
By Brian Fuller - 04 Dec, 2014 - Comments: 0

It’s December, and that means it’s time to review what just happened in electronics design in the hopes that it will help light a path into the New Year. To simplify a year’s work in a global, sophisticated, ever-changing industry, you could say 2014 hinged on to two main tipping points: The marriage of EDA and IP was consummated. The road to the future forked. Let’s look at #1... » read more

Conflicting Needs For IoT Edge Designs
By Ed Sperling - 20 Nov, 2014 - Comments: 1

The mad rush has begun to hype the [getkc id="76" comment="Internet of Things"], but the path forward isn't quite as straightforward as the marketers would like it to be. ICs used at the edge of the IoT—the ones that gather information to be controlled by smart phones or tablets and transmitted to devices for processing and data analytics—need to be designed differently than the initial for... » read more

Measuring Verification Accuracy
By Ann Mutschler - 20 Nov, 2014 - Comments: 0

[getkc id="10" kc_name="Verification"] is the unbounded challenge that continues to confound engineering teams across the globe, who want to know when "enough" is "good enough" to proceed to tapeout. The answer is not straightforward, and it includes more variables than in the past, particularly around power. Harry Foster, chief verification scientist at [getentity id="22017" e_name="Mentor ... » read more

An Inside Look At The GlobalFoundries-IBM Deal
By Ed Sperling - 20 Nov, 2014 - Comments: 3

GlobalFoundries' proposed acquisition of IBM Microelectronics is the kind of deal that will have business schools talking for many years to come—a gargantuan combination of expertise and technology, built on the back of high-profile business successes and failures, long-running legal struggles and global politics—with far-reaching implications for all parts of the semiconductor supply chain... » read more

Week 23: ICCAD, The Kaufman Award And The DAC Exhibitor Meeting
By Anne Cirkel - 14 Nov, 2014 - Comments: 0

It was another week of travel though this time I stayed on schedule – no missed flights! I was in San Jose for several days during which I briefly crossed paths with two EDA stars. Their work suggests that the present and future of our industry is in good shape. And I was there to host a meeting for those exhibiting at DAC, which, if you’ll excuse the pun, will be an even better place to sh... » read more

Future Directions Unknown
By Ed Sperling - 13 Nov, 2014 - Comments: 0

The semiconductor industry has been on cruise control when it comes to shrinking features, but as process technology progresses to 10nm and 7nm there will be some significant changes. For one thing, the cost per new design will continue to rise, which means only the largest companies with the biggest market opportunity will be able to invest at the leading-edge nodes. Chips for mobile phones... » read more

Are Models Holding Back New Methodologies?
By Brian Bailey - 11 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="101" kc_name="modeling"] at abstractions above [getkc id="49" kc_name="RTL"], a factor which has delayed adoption of [getkc id="104" kn_name="virtual prototypes"] and the proliferation of system-level design and hardware/software codesign. Taking part in the discussion were Frank Schirrmeister, group director... » read more

Executive Insight: Lucio Lanza
By Ed Sperling - 30 Oct, 2014 - Comments: 2

Lucio Lanza, managing director of Lanza techVentures, a former Intel engineer, and the 2014 Phil Kaufman Award winner, sat down with Semiconductor Engineering to talk about the shrinking number of startups, future investments, new opportunities in EDA, Moore's Law and the Internet of Things. SE: You're one of the last VCs still actively investing in EDA. Why? Lanza: There are several indi... » read more

Week 19: Ready. Steady. Go!
By Anne Cirkel - 17 Oct, 2014 - Comments: 2

The window for submitting to the IP and designer tracks opens on Oct. 23. It’s time to get ready and check with your management if you can present your work at DAC. You can find the submission details and a link to last year’s content here. You can even browse presentation examples from past designer tracks. If you are an EDA vendor, the designer track is a good opportunity for your use... » read more

Design Rules Explode At New Nodes
By Ed Sperling - 16 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down changing design rules with Sergey Shumarayev, senior director of custom IP design at Altera; Luigi Capodieci, R&D fellow at [getentity id="22819" comment="GlobalFoundries"]; Michael White, director of product marketing for Calibre Physical Verification at [getentity id="22017" e_name="Mentor Graphics"], and Coby Zelnik, CEO of [getentity id="22478" e_name=... » read more

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