tag: emulation

Who Benefits From Chiplets, And When
By Ed Sperling - 31 May, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss new packaging approaches and integration issues with Anirudh Devgan, president and CEO of Cadence; Joseph Sawicki, executive vice president of Siemens EDA; Niels Faché, vice president and general manager at Keysight; Simon Segars, advisor at Arm; and Aki Fujimura, chairman and CEO of D2S. This discussion was held in front of a... » read more

Evolving Your ADAS And AV Tests With Emulation Capability
By Keysight - 25 May, 2022 - Comments: 0

Creating safe and robust autonomous driving (AD) systems is a complex task. Autonomous vehicles (AVs) have hundreds of sensors, all of which need to work with one another inside the car and with other smart vehicles. The software algorithms enabling autonomous driving features will ultimately need to synthesize all the information collected from these sensors to ensure that the vehicle responds... » read more

How To Justify A Data Center
By Ann Mutschler - 24 Mar, 2022 - Comments: 0

The breadth of cloud capabilities and improvements in cost and licensing structures is prompting chipmakers to consider offloading at least some of their design work into the cloud. Cloud is a viable business today for semiconductor design. Over the past decade, the interest in moving to cloud computing has grown from an idea that was fun to talk about — but which no one was serious about ... » read more

Why Comparing Processors Is So Difficult
By Brian Bailey - 10 Mar, 2022 - Comments: 2

Every new processor claims to be the fastest, the cheapest, or the most power frugal, but how those claims are measured and the supporting information can range from very useful to irrelevant. The chip industry is struggling far more than in the past to provide informative metrics. Twenty years ago, it was relatively easy to measure processor performance. It was a combination of the rate at ... » read more

SoC Power Methodology: Are We Lean Enough
By Siemens EDA - 09 Feb, 2022 - Comments: 0

It’s interesting how past lessons learned have such relevance in today’s quest for an optimum system-on chip (SoC) power methodology. Lean manufacturing was introduced by the Toyota Motor Corporation in the 1930s. It is now an essential methodology in most manufacturing and industrial settings. As lean methodology evolved, it extended to software development where its principles have led to... » read more

Dependable Verification Is The Foundation ICs Require
By Pirzad Motafram - 27 Jan, 2022 - Comments: 0

As our world becomes increasingly high-tech, it is easy to lose sight of the little things that make all of our fancy gadgets achieve optimal performance. The one thread that enables you to get all of the benefits of a new laptop, tablet, smartphone, or your automobile’s digital dashboard and connects the components that ensure best performance is the integrated circuit (IC). For as breath... » read more

Veloce Coverage App And Veloce Assertion App Deliver Unified Coverage Methodology
By Siemens EDA - 26 Jan, 2022 - Comments: 0

The interoperability of the Veloce Coverage app and the Veloce Assertion app with other verification engines (simulation and formal) enables merging coverage collected by each engine and provides a cohesive coverage closure report and analysis flow. It enables the verification team and product-level management to make important decisions such as coverage closure sign-off, test quality analysis ... » read more

Run Realistic Software For Full Chip Power Signoff
By Godwin Maben - 09 Dec, 2021 - Comments: 0

In the real world, the demand for AI chips is driving the trend towards bigger, smarter, and faster SoC designs. Consequently, low-power design, analysis, verification, and power signoff challenges are not getting any easier as chip designs deploy increasingly smaller geometries that dissipate more and more power. Despite this dilemma, the quest for further power reductions continues apace. ... » read more

Gaps In The AI Debug Process
By Brian Bailey - 23 Nov, 2021 - Comments: 0

When an AI algorithm is deployed in the field and gives an unexpected result, it's often not clear whether that result is correct. So what happened? Was it wrong? And if so, what caused the error? These are often not simple questions to answer. Moreover, as with all verification problems, the only way to get to the root cause is to break the problem down into manageable pieces. The semico... » read more

Debugging Embedded Applications
By Ann Mutschler - 10 Nov, 2021 - Comments: 0

Debugging embedded designs is becoming increasingly difficult as the number of observed and possible interactions between hardware and software continue to grow, and as more features are crammed into chips, packages, and systems. But there also appear to be some advances on this front, involving a mix of techniques, including hardware trace, scan chain-based debug, along with better simulation ... » read more

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