Next-Generation Parasitic Extraction For 16nm And Beyond


Advanced nodes and innovative process features such as finFET transistors require a leap forward in the performance and accuracy of analysis tools. The new Calibre xACT solution is a high-performance, high-accuracy parasitic extraction tool architected from the top-down for diverse IC design styles at advanced nodes. The Calibre xACT product delivers reference-level accuracy for leading-edge fi... » read more

One-On-One: Thomas Caulfield


Semiconductor Engineering sat down to talk about fabs, process technology and the equipment industry with Thomas Caulfield, senior vice president and general manager of Fab 8 at [getentity id="22819" comment="GlobalFoundries"]. Located in Saratoga County, N.Y., Fab 8 is GlobalFoundries’ most advanced 300mm wafer fab. What follows are excerpts of that discussion. SE: Last year, GlobalFoundr... » read more

Rethinking Power


Power typically has been the last factor to be considered in the PPA equation, and it usually was somebody else's problem. Increasingly it's everyone's problem, and EDA companies are beginning to look at power differently than in the past. While the driving forces vary by market and by process node, the need to save energy at every node and in almost all designs is pervasive. In the server m... » read more

Trouble Ahead For IP industry?


[getkc id="106" kc_name="Power-aware design"] has risen from an afterthought to a primary design constraint for some design types. Initially it was smart phones and other battery operated devices. It has consistently expanded into additional areas including those plugged into the wall and those plugged into the grid. Some parts of the world are imposing restrictions on the power that a device c... » read more

Accelerating Development For LP


Power is a limiting factor in all devices these days, and while most of the industry has seen this coming for several process nodes and a succession of mobile devices with limited battery life, the power problem remains a work in progress. No matter how much progress is made—and there has been plenty of work done in the areas of multiple power domains, dark silicon, dynamic voltage and fr... » read more

FD-SOI Vs. FinFETs


Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

FD-SOI Vs. FinFETs


Semiconductor Engineering sat down to compare the benefits, risks and challenges of moving to finFETs compared with fully depleted silicon on insulator ([getkc id="220" kc_name="FD-SOI"]) with Philippe Magarshack, group vice president for technology R&D at [getentity id="22331" comment="STMicroelectronics"]; Marco Brambilla, director of engineering at [getentity id="22150" e_name="Synapse D... » read more

Analysis: Applied-TEL Scrap Merger


After several delays due to a myriad of complex regulatory issues, Applied Materials’ proposed deal to buy Tokyo Electron Ltd. (TEL) has been scrapped. It appears that the U.S. Department of Justice (DoJ) stepped in and blocked the deal. Now that the deal has been terminated, Applied Materials and TEL are separately re-grouping, and are back to where they originally started as fierce compe... » read more

Problems Ahead For EDA


You may have discovered that the Semiconductor Engineering Knowledge Center (KC) provides various ways in which data can be viewed. One way is to see what events happened in a given year. During the 1990s, company activity in terms of new startups and acquisitions reached a peak, and in 1997 there were at least 29 startups that the KC contains and 25 companies acquired (let us know if there wer... » read more

Moore’s Law At 50


Moore's Law turned 50 this week…but not because of Gordon Moore. He observed that the number of transistors crammed onto a piece of silicon was doubling every 18 to 24 months and predicted that would continue to be the case. He was right, but it took many thousands of engineers who created methodologies and tools to automate the design and equipment to manufacture complex chips to make that o... » read more

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