Searching For Rare Earths


The semiconductor industry is pre-occupied with several and expensive technologies at once. One the device side, the industry is looking at new chip architectures, such as 3D NAND, finFETs and stacked die. On the manufacturing front, there is 450mm technology, next-generation lithography (NGL) and new materials. And that’s just the tip of the iceberg. Another technology that deserve... » read more

Favorite Forecast Fallacies


It’s difficult to make predictions, especially about the future. – An Old Danish Proverb. The GSA Silicon Summit was held on Thursday, April 10th at the Computer History Museum in Mountain View, CA. The opening panel session was entitled Advancements in Nanoscale Processing. The panelists were Rob Aitken (ARM), Adam Brand (Applied Materials), Peter Huang (TSMC), Nick Kepler (VLSI Researc... » read more

Power Moves Up To First Place


Virtually every presentation delivered about semiconductor design or manufacturing these days—and every end product specification that uses advanced technology—incorporates some reference to power and/or energy. It has emerged as the most persistent, most problematic, and certainly the most talked about issue from conception to marketplace adoption. And the conversation only grows louder... » read more

How Much Will That Chip Cost?


From the most advanced process nodes to the trailing edge of design there is talk about the skyrocketing cost of developing increasingly complex SoCs. At 16/14nm it’s a combination of multi-patterning, multiple power domains and factoring in physical and proximity effects. At older nodes, it’s the shift to more sophisticated versions of the processes and new tools to work within those proce... » read more

Blog Review: March 19


ARM’s Diya Soubra has discovered an interesting term in relation to the Internet of Things: Compound Applications. Will that make the IoT more compelling? Mentor’s Colin Walls points to some less obvious reasons for choosing a processor. No. 4 on his list is particularly noteworthy. Synopsys’ Mick Posner has some thoughts about wearable computing prototypes. Check out the top pho... » read more

More Pain In More Places


Pain is nothing new in to the semiconductor industry. In fact, the pain of getting complex designs completed on budget, and finding the bugs in those designs, has been responsible for decades of continuous growth in EDA, IP, test, packaging, and foundries. But going forward there is change afoot in every segment of the flow from architecture to design to layout to verification to manufacturi... » read more

Power Shift


The disaggregation of the mobile market, which began with Nokia, Ericsson and RIM challenging the entrenched position of Motorola back in the late 1990s, is shifting again. This time it’s being driven by a different kind of power play, namely physical power issues inside a device. The biggest problem in shrinking die and pushing economies of scale in conjunction with Moore’s Law is relat... » read more

FinFET Reliability Issues


The 16nm FinFET node has introduced several new challenges in the IC design community. In addition to the complexity of power-noise and electromigration (EM) verification, thermal reliability has become a major concern for both chip and package designers. With the three-dimensional architecture of FinFET devices, new simulation approaches are being used to model thermal behavior of the die in o... » read more

New Challenges For Post-Silicon Channel Materials


In order to bring alternative channel materials into the CMOS mainstream, manufacturers need not just individual transistor devices, but fully manufacturable process flows. Work presented at the recent IEEE Electron Device Meeting (Washington, D.C., Dec. 9-11, 2013) showed that substantial work remains to be done on almost all aspects of such a flow. First and most fundamentally, it is diffi... » read more

Executive Insight: Luc Van den hove


Semiconductor Engineering sat down to discuss current and future process technology challenges with Luc Van den hove, president and chief executive of Imec. What follows are excerpts of that conversation. SE: The industry is simultaneously working on several new and expensive technologies. This includes extreme ultraviolet (EUV) lithography and the next-generation 450mm wafer size. The indu... » read more

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