tag: FPGAs

Developing High-Reliability FPGAs For DO-254
By Louie De Luna - 27 Aug, 2015 - Comments: 0

You have been developing FPGAs for a long time, and you know your designs from top to bottom. You know every interface protocol, configuration and optimization. You can visualize your timing diagram like you can visualize your upcoming vacation in Hawaii. You can manually write down your memory mapping accurately while under oath. You can pinpoint all CDC paths and emulate metastability in your... » read more

Making Hardware Design More Agile
By Ed Sperling - 30 Jul, 2015 - Comments: 0

Semiconductor engineering sat down to whether changes are needed in hardware design methodology, with Philip Gutierrez, ASIC/FPGA design manager in [getentity id="22306" comment="IBM"]'s FlashSystems Storage Group; Dennis Brophy, director of strategic business development at [getentity id="22017" e_name="Mentor Graphics"]; Frank Schirrmeister, group director for product marketing of the System ... » read more

IP Verification Challenges
By Brian Bailey - 30 Jul, 2015 - Comments: 0

At the Design Automation Conference this year, the Designer and IP tracks were the stars of the show in many ways. These sessions catered to industry rather than academia and provided engineers with information they could directly use in their jobs. Many of the sessions were filled to capacity and Anne Cirkel, general chair for the 52nd DAC, was enthusiastic about the growing success of these t... » read more

Intel Plus Altera
By Ed Sperling - 25 Jun, 2015 - Comments: 0

Since the Intel-Altera deal reached the handshake phase earlier this month, there have been a lot of theories being forwarded and a lot of questions being raised. And there have been very few answers, in part because the deal isn't finalized yet and in part because this marriage will take time to play out in the market—maybe years. But along with the GlobalFoundries-IBM pairing, this is th... » read more

Executive Insight: Charles Janac
By Ed Sperling - 08 Jun, 2015 - Comments: 0

SE: One of the big stories these days is consolidation. What are you seeing on your side? Janac: There are about 230 companies doing SoCs right now. Maybe 150 should be doing that. As the game gets more expensive and more difficult, some of the companies that don't have volume may have to do something else. Consolidation is part of that. But you're also going to see movement toward platforms... » read more

Blog Review: June 3
By Jesse Allen - 03 Jun, 2015 - Comments: 0

An emergency torch that lets you breathe while escaping a smoke-filled building; a car that shrinks to fit into parking spaces that aren't quite big enough: from extreme situations to everyday activities, Ansys' Justin Nescott features devices designed to make life easier and safer in his picks for week’s top five engineering articles. Check out the prosthetic foot that takes commands from se... » read more

Blurring The Lines On Prototyping
By Ann Mutschler - 23 Apr, 2015 - Comments: 0

Prototyping is an integral part of every [getkc id="81" kc_name="SoC"] today, with two main approaches being used: virtual or software-based, and physical, which includes FPGA-based boards as well as hardware emulation systems. [getkc id="104" kc_name="Virtual prototyping"] is typically used for software development in the early stages of SoC design, even before SoC [getkc id="49" kc_name="R... » read more

FinFET Rollout Slower Than Expected
By Mark LaPedus - 16 Apr, 2015 - Comments: 1

The foundry business is heating up as some new and large players are entering the 16nm/14nm [getkc id="185" kc_name="finFET"] market. But foundry customers are taking longer than expected to migrate to finFETs amid some technical and cost issues. On the foundry front, [getentity id="22846" comment="Intel"] has been the sole player in finFETs for some time. But now, [getentity id="22865" ... » read more

Blog Review: March 18
By Jesse Allen - 18 Mar, 2015 - Comments: 0

How do you quantify effort spent in FPGA verification? Mentor's Harry Foster tackles the question in his latest installment of the Wilson Research Group functional verification study. A new frontier of design challenges is rapidly emerging, according to ARM CEO Simon Segars. Cadence's Brian Fuller brings us his keynote address at CDNLive. Synopsys' Tushar Mattu is back with more on AXI VI... » read more

Flex Logix: FPGA Cores
By Ed Sperling - 23 Feb, 2015 - Comments: 0

One of the interesting challenges in the semiconductor space these days is getting a design right, because the cost of making mistakes is rising at each new process node and as more and more functionality is added into chips. This has always been one of the benefits of programmable logic, where logic and layout can be tweaked to fit into multiple devices and errors can be fixed even late in ... » read more

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