RISC-V’s Expanding Footprint


Zdenek Prikryl, CTO of Codasip, sat down with Semiconductor Engineering to talk about the RISC-V market, where this open instruction set architecture (ISA) is gaining ground, and what are the biggest challenges in working with this technology. SE: Where do you see the value in RISC-V? Is it for off-the-shelf processors or more customized components? Prikryl: A few years ago, RISC-V was us... » read more

Power Challenges In ML Processors


The design of artificial intelligence (AI) chips or machine learning (ML) systems requires that designers and architects use every trick in the book and then learn some new ones if they are to be successful. Call it style, call it architecture, there are some designs that are just better than others. When it comes to power, there are plenty of ways that small changes can make large differences.... » read more

Distributed Design Implementation


PV Srinivas, group director for R&D at Synopsys, talks about the impact of larger chips and increasing complexity on design productivity, why divide-and-conquer doesn’t work so well anymore, and how to reduce the number of blocks that need to be considered to achieve faster timing closure and quicker time to market. » read more

Who’s Watching The Supply Chain?


Every company developing chips at the most advanced process nodes these days is using different architectures and heterogeneous processing and memory elements. There simply is no other way to get the kind of power/performance improvements needed to justify the expense of moving to a new process node. So while they will reap the benefits of traditional scaling, that alone is no longer enough. ... » read more

Process Window Optimization


David Fried, vice president of computational products at Lam Research, examines increasing process variation and interactions between various types of variation, why different approaches are necessary to improve yield and continue scaling. » read more

CEO Outlook: It Gets Much Harder From Here


Semiconductor Engineering sat down to discuss what's changing across the semiconductor industry with Wally Rhines, CEO emeritus at Mentor, a Siemens Business; Jack Harding, president and CEO of eSilicon; John Kibarian, president and CEO of PDF Solutions; and John Chong, vice president of product and business development for Kionix. What follows are excerpts of that discussion, which was held in... » read more

The Next Spoiler Alert


Speculative execution seemed like a good idea at the time. As the power/performance benefits of each node shrink began to dwindle, companies like Intel figured out ways to maintain processor speeds at the same or lower power. There were other approaches, as well. Speculative execution and branch prediction are roughly equivalent to pre-fetch in search, which has gotten so good that often the... » read more

More Than A Core


Gajinder Pandesar, CTO of UltraSoC, talks with Semiconductor Engineering about why heterogeneous design is changing the starting point for chip design, and why integration is now the real challenge rather than the processor core. https://youtu.be/y0rzopp5HDI » read more