Chip Industry’s Technical Paper Roundup: Apr. 18


New technical papers recently added to Semiconductor Engineering’s library: [table id=93 /]   If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involv... » read more

Week In Review: Semiconductor Manufacturing, Test


U.S. Senate Majority Leader Chuck Schumer said he launched an effort to establish rules on artificial intelligence to address national security and education concerns, Reuters reported. "Time is of the essence to get ahead of this powerful new technology to prevent potentially wide-ranging damage to society and national security and instead put it to positive use by advancing strong, bipartisan... » read more

What Designers Need To Know About GAA


While only 12 years old, finFETs are reaching the end of the line. They are being supplanted by gate-all-around (GAA), starting at 3nm [1], which is expected to have a significant impact on how chips are designed. GAAs come in two main flavors today — nanosheets and nanowires. There is much confusion about nanosheets, and the difference between nanosheets and nanowires. The industry still ... » read more

Digital Neuromorphic Processor: Algorithm-HW Co-design (imec / KU Leuven)


A technical paper titled "Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design" was published by researchers at imec and KU Leuven. "In this work, we open the black box of the digital neuromorphic processor for algorithm designers by presenting the neuron processing instruction set and detailed energy consumption of the SENeCA neuromorphic architect... » read more

Challenges Grow For CD-SEMs At 5nm And Beyond


CD-SEM, the workhorse metrology tool used by fabs for process control, is facing big challenges at 5nm and below. Traditionally, CD-SEM imaging has relied on a limited number of image frames for averaging, which is necessary both to maintain throughput speeds and to minimize sample damage from the electron beam itself. As dimensions get smaller, these limitations result in higher levels of n... » read more

Research Bits: April 4


Wet-like plasma etching Researchers from Nagoya University and Hitachi developed a new etch method called wet-like plasma etching that combines the selectivity of wet etching with the controllability of dry etching. The researchers say the technique will make it possible to etch complex structures such as metal carbides consisting of titanium (Ti) and aluminum (Al), such as TiC or TiAlC, wh... » read more

Week In Review: Design, Low Power


Synopsys rolled out an AI-driven design suite called Synopsys.ai at the Synopsys User Group conference this week, which it says reduces time to better results at multiple points in the design flow. The company noted the new technology uses reinforcement learning, which compensates for relatively small data sets by allowing engineers to interact with that data more easily at any point, and to ch... » read more

Chip Industry’s Technical Paper Roundup: Mar. 28


New technical papers recently added to Semiconductor Engineering’s library: [table id=89 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Integrating MEMS with Standardized Silicon Photonics Technology


A new technical paper titled "Integrated silicon photonic MEMS" was published by researchers at EPFL, University of Sydney, CSEM, KTH Royal Institute of Technology, Ghent University, Imec, and Tyndall National Institute. Abstract Excerpt "Here, we introduce a silicon photonic MEMS platform consisting of high-performance nano-opto-electromechanical devices fully integrated alongside standar... » read more

Big Changes Ahead In Power Delivery, Materials, And Interconnects


Part one of this forecast looked at evolving transistor architectures and lithography platforms. This report examines revolutions in interconnects and packaging. When it comes to device interconnects, it’s hard to beat copper. Its low resistivity and high reliability have served the industry exceedingly well as both on-chip interconnect and wires between chips. But in logic chips, with int... » read more

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